English
Search IP
Latest News
Today on Design-Reuse.com
Arasan expands its MIPI IP portfolio with the announcement of the immediate availability of its SPMI IP (System Power Management Interface) compliant ... Read
Semidynamics, the leading IP company for high performance, AI-enabled, RISC-V processors, is happy to announce that UPMEM has selected Semidynamics as ... Read
Sondrel has announced that it is now shipping finished chips to a US customer as part of a full turnkey contract of concept to silicon. The chips are ... Read
Partner Highlight
Avant Technology has been appointed as the sales representative for EnSilica focusing on promoting EnSilica's advanced eSi-Crypto IP, including their ... Read
Qualitas Semiconductor announced that its MIPI D-PHY IP has been integrated into an artificial intelligence (AI) and vision processing microprocessor ... Read
YorChip, Inc. and Digitho extend partnership to develop a breakthrough 2D low cost advanced Chiplet Packaging solution. Currently advanced packaging is ... Read
Industry Expert Blogs
Cadence Blog Cadence
Ceva's Experts blog Franz Dugand, Ceva
With Imagination Blog Eleanor Brash, Imagination
Maven Silicon Blog Sivakumar P R, Founder & CEO, Maven Silicon
MIPI D-PHY Universal IP in UMC 28HPC+
Low Dropout (LDO) Capless Regulator
HBM3 PHY on TSMC N3P
Camera Demosaicing IP
Scalable, On-Die Voltage Regulation for High Current Applications ...
Ultra Compact Ethernet TSN End Station Controller IP for Automotive ...
0.6V/10uA, 20uA Bandgap and V2I converter (Voltage to current) ...
eMMC LDPC Encoder/Decoder
AES GCM IP Core
Intra-Panel Multi Strandard TX on Samsung Foundry LN08LPP/LPU ...
4.5GHz Fractional-N/SSC PLL
WDT Verification IP
Simulation VIP for AMBA LTI
UCIe Verification IP
BoW Verification IP
PCIe 4.0 LP PHY in
Industry Articles
-
Early Interactive Short Isolation for Faster SoC Verification
Ritu Walia
Siemens -
The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification
PUF Security
-
Advanced Packaging and Chiplets Can Be for Everyone
Boris Chau
Faraday Technology Corporation -
Timing Optimization Technique Using Useful Skew in 5nm Technology Node
Samir Shaikh
eInfochips -
Streamlining SoC Design with IDS-Integrate™
Agnisys
-
Last-Time Buy Notifications For Your ASICs? How To Make the Most of It
Enrique Martinez
EnSilica -
CANsec: Security for the Third Generation of the CAN Bus
CAST and Fraunhofer IPMS
-
Accelerating SoC Evolution With NoC Innovations Using NoC Tiling for AI and Machine Learning
Andy Nightingale
Arteris
