Design & Reuse
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New Products

Chips&Media, Inc.
CFrame60, lossy, lossless FBC compression, decompression IP
MosChip Technologies, USA
Clock Management IP (Exclusively for Turnkey ASIC design; not for standalone licensing)
Arkchips
TSMC XTAL(Crystal) Oscillator in various frequency
Key ASIC
TSMC 25Gbps SerDes IP with Equalizer
MAXVY Technologies Pvt Ltd
DDR5 CKD 01 - Clock Driver

Blogs

Why Weebit’s IP Licensing Model Matters
Weebit Nano
Weebit Nano
Evolution of CXL PBR Switch in the CXL Fabric
Cadence Design Systems, Inc.
Satish Kumar C
Cadence Design Systems, Inc.
Power Tradeoffs for Chiplets: What Designers Need to Know
Cadence Design Systems, Inc.
NaomiM
Cadence Design Systems, Inc.
Imagination GPUs now support Vulkan 1.4 and Android 16
Imagination Technologies Group Ltd.
Patrik Masson
Imagination Technologies Group Ltd.
UCIe 3.0 Is Here: Synopsys IP Solutions Are Ready
Synopsys, Inc.
Varun Agrawal
Synopsys, Inc.
Breaking the Silence: What Is SoundWire-I3S and Why It Matters
Arasan Chip Systems Inc.
Arasan Chip Systems Inc.
Accelerating RTL Design with Agentic AI: A Multi-Agent LLM-Driven Approach
MosChip Technologies, USA
Rakesh Nakod
MosChip Technologies, USA
Trust at the Core: A Deep Dive into Hardware Root of Trust (HRoT)
Synopsys, Inc.
Frank Malloy, Vincent van der Leest
Synopsys, Inc.
MIPI: Powering the Future of Connected Devices
Rambus, Inc.
Rambus, Inc.
How to design secure SoCs, Part V: Data Protection and Encryption
KiviCore
KiviCore
How GF FDX™ and FinFET solutions are powering the next generation of Wi-Fi
Suzanna Chang, Sr. Director, IoT End Market
GlobalFoundries
LPDDR6: A New Standard and Memory Choice for AI Data Center Applications
Cadence Design Systems, Inc.
Frank Ferro
Cadence Design Systems, Inc.

Articles

Design Approaches and Architectures of RISC-V SoCs
Maven Silicon
Maven Silicon
Implementation of Metal ECO using Mask Programmable Cell for Hold Timing Violations
eInfochips, Inc.
Dhanyakumar Shah,Dharmik Lakhani
eInfochips, Inc.
Unlocking the Power of Digital Twins in ASICs with Adaptable eFPGA Hardware
Menta
Menta
Bridging Design Verification Gaps with Formal Verification
Karim Waseem, Si-vision
Post-Quantum Cryptography: Why Open Source alone is Not Enough for Secure IP Deployment
PQSecure Technologies
Dr. Reza Azarderakhsh
PQSecure Technologies
The Blind Spot of Semiconductor IP Sales
CoreHW
Petri Heliö, Principal IC Designer
CoreHW
SWE-Bench-C Evaluation Framework
Vayavya Labs
Vayavya Labs
Point of View: Key Recommendations for Enabling Predictive Maintenance at the Edge with AI in Industrial IoT
MosChip Technologies, USA
Nayan Goswami, Manager PES division
MosChip Technologies, USA
How Next-Gen Chips Are Unlocking RISC-V's Customization Advantage
Andes Technology Corp.
Marc Evans, Director of Business Development & Marketing
Andes Technology Corp.
Exploring the Latest Innovations in MIPI D-PHY and MIPI C-PHY
Mixel, Inc.
Michael Nagib, Mixel and Nuno Martins, Xpressphy
Mixel, Inc.
Why RPAs Fall Short in IIoT and How Agentic AI Fills the Gap
MosChip Technologies, USA
Rakesh Nakod
MosChip Technologies, USA
ComputeRAM in AI accelerators: An LLM case study
Synthara
Synthara
Asic Technology
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FPGA and eFPGA Corner
Select your target vendor and device
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