Design & Reuse
Catalog of SIP Cores
System on Chip design resources
arrow AMBA AHB / APB/ AXI (203)
arrow CXL (21)
arrow D2D (1)
arrow Gen-Z (6)
arrow HDMI (88)
arrow I2C (96)
arrow Interlaken (3)
arrow MIL-STD-1553 (3)
arrow MIPI (508)
arrow Multi-Protocol PHY (33)
arrow PCI (241)
arrow RapidIO (6)
arrow SAS (5)
arrow SATA (74)
arrow Serdes (106)
arrow Smart Card (3)
arrow USB (405)
arrow V-by-One (22)
arrow VESA (80)
arrow Other (36)
1940 IP
601
5.0
SPI Slave Controller (SPI2APB, SPI2AXI, SPI2AHB Bus)
The Digital Blocks DB-SPI-S-AMBA-BRIDGE is a Serial Port Interface (SPI) Controller Verilog IP Core supporting SPI Slave Interface to APB Master Bus. ...
602
5.0
USB 2.0 Hub Controller
...
603
5.0
USB 2.0 On-chip oscillator, termination resistors, and DP/DM short circuit protection (0.18u)
The KA18USB20 consists of the digital and analog blocks of the USB Transceiver Macrocell (UTMI) specifications. This macrocell is certified and compli...
604
5.0
USB 2.0 PHY
The Arasan USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use...
605
5.0
USB Power Delivery 3.1 Physical Layer
CT20602 is a complete USB Power Delivery 3.1 Physical Layer. It also implements that part of the USB Power Delivery 3.1 Protocol Layer which are def...
606
5.0
USB-C Interface
CT20601 is a complete USB Type-C Interface which includes optional VCONN and VBUS management features. It implements the dual-role port CC1/CC2 inte...
607
5.0
eSPI & SPI Master/Slave Controller w/FIFO (APB, AHB, or AXI Bus)
The Digital Blocks DB-eSPI-SPI-MS-AMBA is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting the addition of Enhanced SPI (eSPI...
608
5.0
eUSB Repeater
CT20603 IP implements a dual-role capable eUSB2 repeater enabling an eUSB2 PHY in SOCs to support connections with USB2.0 compliant hosts and peripher...
609
5.0
SWI3S Peripheral core IP
Arasan’s SWI3S (SoundWire I3S Interface) Peripheral Controller Core IP implements the link protocol to communicate in half-duplex fashion to transfer ...
610
4.5077
PCIe refclk buffer (14nm)
The output buffer to deliver a differential clock signal from inside chip to outside for PCIe interface...
611
4.5077
PCIe refclk buffer (8nm)
The output buffer to deliver a differential clock signal from inside chip to outside for PCIe interface...
612
4.5077
MIPI C-PHY 8Gsps / D-PHY 9Gbps TRX Combo PHY (SF2P)
The MIPI D-PHY/C-PHY Combo IP supports data rates of up to 9Gbps for D-PHY and 8Gsps for C-PHY. It operates in High-Speed (HS), Low-Power (LP), and Es...
613
4.5077
HSSTP Link
The High-Speed Serial Trace Port (HSSTP) Controller IP implements the ARM HSSTP protocol. HSSTP replaces the existing parallel data output port, enab...
614
4.5077
HSSTP PHY TX (5nm) (1.5 Gbps, 3 Gbps, and 6 Gbps)
The HSSTP TX PHY is a 5nm hard macro supporting up to 6Gbps data rates with dual lanes and a hybrid mode driver for AC-coupled links. It includes feat...
615
4.0
I2C Master Controller
The ntI2C_M is an I2C-bus multi-master interface controller and provides a cost-effective solution for a wide range of applications that require a low...
616
4.0
SAS 1-to-1 Speed Bridge with Sandbox
The IntelliProp SAS Bridge with Sandbox (IPP-SS115A-BR) design provides SAS compliant connections to a SAS host and a SAS device. The host and device ...
617
4.0
SAS Initiator Core
The IntelliProp IPC-SS105A-HI SAS Initiator Core is an industry standard Serial-SCSI (SAS) initiator core that enables host designs to connect to high...
618
4.0
SAS Target Core
The IntelliProp IPC-SS107A-DT SAS Target Core is an industry standard Serial-SCSI (SAS) Core that enables device applications to connect to high throu...
619
4.0
SATA "Y" Bridge
The IntelliProp SATA "Y" Bridge design (IPP-SA111A-BR) provides SATA compliant connections per SATA-IO 3.3 and a standard SATA interface to access dri...
620
4.0
SATA "Y" RAID Bridge without NCQ
The IntelliProp IPP-SA112A-BR SATA “Y” Bridge with RAID design provides SATA compliant connections and a standard SATA interface that performs RAID0 t...
621
4.0
SATA 1-to-1 Speed Bridge with Sandbox
The IntelliProp SATA 1-to-1 Speed Bridge with Sandbox (IPP-SA110A-BR) design provides SATA compliant connections to a SATA host and a SATA device. The...
622
4.0
SATA Bridge Platform (Optional: AES, Hardware Datapath)
The IntelliProp SATA Bridge Platform is an extensible IP Core which encompasses a SATA Device core, a SATA Host core, along with an embedded processor...
623
4.0
SATA Device ADCI Core
IntelliProp’s SATA Device ADCI core (IPC-SA155A-DT) is an industry standard Serial-ATA (SATA) device interface core that allows companies to build hig...
624
4.0
SATA Host AHCI Core
The IntelliProp SATA Host AHCI (IPC-SA156A-HI) is an industry standard Serial-ATA (SATA) host interface core that enables customers to use high throug...
625
4.0
SATA Host App Core
IntelliProp’s SATA host core (IPC-SA101A-HI) is an industry standard Serial-ATA (SATA) host interface core that enables host application companies to ...
626
4.0
SATA RAID Core
The IntelliProp IPC-BL109A-RD SATA RAID Core is a hardware design block written in HDL that performs RAID 0 operations to provide higher performance a...
627
4.0
Gen-Z Link Layer IP Core
The IntelliProp IPC-GZ198A-ZM Gen-Z Link Layer is an IP Core that allows companies to build Gen-Z compliant devices. The IPC-GZ198A-ZM is compliant wi...
628
4.0
Gen-Z Physical Layer for 802.3 IP Core
The IntelliProp IPC-GZ196A-ZM Gen-Z Physical Layer for 802.3 is an IP Core that allows companies to attach a Gen-Z core to an 802.3 Phy. The IPC-GZ196...
629
4.0
Gen-Z Physical Layer for PCIe IP Core
The IntelliProp IPC-GZ197A-ZM Gen-Z Physical Layer for PCIe is an IP Core that allows companies to attach a Gen-Z core to a PCIe Phy. The IPC-GZ197A-Z...
630
4.0
Gen-Z Requester IP Core
The IntelliProp IPC-GZ190A-HI Gen-Z Requester is an IP Core that allows companies to build Gen-Z compliant Requester devices. The IPC-GZ190A-HI is com...
631
4.0
Gen-Z Responder IP Core
The IntelliProp IPC-GZ189A-DT Gen-Z Responder is an IP Core that allows the building of Gen-Z compliant media devices. The IPC-GZ189A-DT is compliant ...
632
4.0
Gen-Z Switch IP Core
The IntelliProp IPC-GZ201A-ZM Gen-Z Switch is an IP Core that allows companies to build Gen-Z compliant components. The IPC-GZ201A-ZM is compliant wit...
633
4.0
USB 3.0 Hub
...
634
4.0
USB3.1 PHY
With sophisticated architecture and advanced technology, KNiulink USB3.1 transceiver IP with PMA and PCS layer is designed for low power and high perf...
635
4.0
NVMe-to-SATA Bridge
The IntelliProp IPP-NV186A-BR is an NVMe-to-SATA Bridge that utilizes the IntelliProp NVMe Target IP Core and the IntelliProp SATA AHCI Host Core to c...
636
3.0
I2C Master / Slave Controller w/FIFO (AHB & AHB-Lite Bus)
The Digital Blocks DB-I2C-MS-AHB Controller IP Core interfaces a microprocessor via the AHB system Interconnect Fabric to an I2C Bus. The I2C is a t...
637
3.0
I2C Master / Slave Controller w/FIFO (APB Bus)
The Digital Blocks DB-I2C-MS-APB Controller IP Core interfaces a microprocessor via the APB system Interconnect Fabric to an I2C Bus. The I2C is a t...
638
3.0
I2C Master Controller w/FIFO (APB Bus)
The Digital Blocks DB-I2C-M-APB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC, or other high performance microprocessor via the AMBA 2.0 AP...
639
3.0
I2C Slave Controller - Low Power, Low Noise Config of User Registers
The DB-I2C-S-SCL-CLK is an I2C Slave Controller IP Core focused on low power, low noise ASIC / ASSP designs requiring the configuration & control of r...
640
3.0
I2C Slave Controller w/FIFO (APB or AHB or AHB-Lite or AXI-Lite Bus)
The Digital Blocks DB-I2C-S-APB / DB-I2C-S-AHB / DB-I2C-S-AXI / DB-I2C-S-AVLN Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC,NIOS II or othe...
641
3.0
I2C Slave with AHB Master Bridge (I2C2AHB)
The DB-I2C-S-AHB-BRIDGE is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring internal configuration & c...
642
3.0
I2C Slave with APB Master Bridge (I2C2APB)
The DB-I2C-S-APB-BRIDGE is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring internal configuration & c...
643
3.0
I2C Slave with AXI Master Bridge (I2C2AXI4)
The DB-I2C-S-AXI-BRIDGE is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring internal configuration & c...
644
3.0
2D Graphics Hardware Accelerator (AXI4 Bus)
The DB9200AXI4 2D Graphics Engine Verilog IP Core targets low VLSI footprint, high-performance hardware accelerated graphics applications. The DB92...
645
3.0
AHB2APB Bridge IP
Truechip's AHB2APB Bridge IP provides chip designers and architects, an efficient way to connect Different Bus Protocol based IPs with reduced latency...
646
3.0
UHS-II PHY for SD4/SD5 TSMC 12nm FF
SD 4.0 (UHS-II) achieves a peak interface speed of 3.12 Gbps. Arasan’s UHS-II PHY is compliant with the specification of UHS-II and is an extremely ar...
647
3.0
UHS-II PHY for SD4/SD5 TSMC 16nm FF
SD 4.0 (UHS-II) achieves a peak interface speed of 3.12 Gbps. Arasan’s UHS-II PHY is compliant with the specification of UHS-II and is an extremely ar...
648
3.0
High Performance, Low Latency PCIe Gen5 PHY
Terminus Circuits offers best-in-class PHY IP for PCI Express Gen 5/4/3/2/1. The PHY is designed for low latency, low power, small form factor, high i...
649
3.0
Single Lane and Quad Lane 10Gbps USB3.1 PHY IP in GF 28SLP process
TERMINUS CIRCUITS USB 3.1 GEN2 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
650
3.0
Single Lane and Quad Lane 10Gbps USB3.1 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS USB 3.1 GEN2 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...