Design & Reuse
Catalog of SIP Cores
System on Chip design resources
6 IP
1
31.0
HBM4 VIP
SmartDV's HBM4 Verification IP is a comprehensive solution for verifying High Bandwidth Memory 4 interfaces, delivering up to 2 TB/s per stack across ...
2
21.0
HBM3 VIP
SmartDV's HBM3 Verification IP is a comprehensive solution for verifying High Bandwidth Memory 3 interfaces, delivering up to 819 GB/s per device for ...
3
0.0
HBM Verification IP
Truechip's HBM Verification IP provides an effective & efficient way to verify the components interfacing with HBM interface of an ASIC/FPGA or SoC....
4
0.0
HBM Verification IP
The Atria Logic High Bandwidth Memory (HBM) Verification IP is a System Verilog (SV) based IP that can be used to verify a HBM memory controller desig...
5
0.0
HBM2E VIP
SmartDV's HBM2E Verification IP is a comprehensive solution for verifying High Bandwidth Memory 2E interfaces, delivering the high bandwidth and low p...
6
0.0
High Bandwidth Memory (HBM) Verification IP
HBM: HBM (High Bandwidth memory) is a high performance RAM interface for 3D-stacked DRAM. HBM has been adopted as industry standard by JEDEC. ...