Design & Reuse
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arrow Other (280)
280 IP
1
0.7246
I2S Verification IP
I2S Verification IP provides an smart way to verify the I2S bi-directional two-wire bus. The SmartDV s I2S Verification IP is fully compliant with ver...
2
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Safe-By-Wire Plus Verification IP
Safe-By-Wire Plus (SBWP) VIP is an advanced solution in the market for the verification of Safe-By-Wire Plus (SBWP) two-wire serial communications bus...
3
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DALI Verification IP
The SmartDV Verification IP (VIP) for DALI provides an efficient and simple way to verify the DALI protocol bus. The SmartDV s VIP for DALI is fully c...
4
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Camera Parallel Interface (CPI) Verification IP
CPI is Developed by experts who has worked on multiple Video and Camera protocols to support the Image sensor digital interface captures images at a p...
5
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CAN Verification IP
CAN 2.0 VIP is an advanced solution in the market for the verification of CAN 2.0(A & B) implementations. It is adherent with CAN 2.0 VIP (plus addend...
6
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Parallel PCRAM Memory Model
Parallel PCRAM Memory Model provides an smart way to verify the Parallel PCRAM component of a SOC or a ASIC. The SmartDV s Parallel PCRAM memory model...
7
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OBSAI Verification IP
The SmartDV s OBSAI Verification IP is fully compliant with OBSAI Reference Point 1 Specification Version 2.1 and Reference Point 3 Specification Vers...
8
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SBSRAM Memory Model
SBSRAM Memory Model provides an smart way to verify the SBSRAM component of a SOC or a ASIC. The SmartDV s SBSRAM memory model is fully compliant with...
9
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TCAM Memory Model
TCAM Memory Model provides an smart way to verify the TCAM component of a SOC or a ASIC. The SmartDV s TCAM memory model is fully compliant with stand...
10
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GCI Verification IP
The GCI Verification IP is compliant with 1.3 specifications and verifies GCI interfaces of designs GCI Interface. It can work with SystemVerilog,Vera...
11
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FCRAM Memory Model
FCRAM Memory Model provides an smart way to verify the FCRAM component of a SOC or a ASIC. The SmartDV s FCRAM memory model is fully compliant with st...
12
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SD Express Verification IP
SD Express VIP is an advanced solution in the market for the verification of SD Express implementations. It can generate all command types. The SD Exp...
13
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PDM Verification IP
PDM can digitally represents high quality audio, and is inexpensive and easy to implement. In PDM,an analog signal can be directly sampled at a high s...
14
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TDM Verification IP
TDM Verification IP provides a smart way to verify TDM over I2S. The SmartDV s TDM Verification IP is compliant with TDM blocks in IC s CS5368 , TMS32...
15
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EDORAM Memory Model
EDORAM Memory Model provides an smart way to verify the EDORAM component of a SOC or a ASIC. The SmartDV s EDORAM memory model is fully compliant with...
16
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QDR2 Memory Model
QDR2 Memory Model provides an smart way to verify the QDR2 component of a SOC or a ASIC. The SmartDV s QDR2 memory model is fully compliant with stand...
17
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QDR4 Memory Model
QDR4 Memory Model provides an smart way to verify the QDR4 component of a SOC or a ASIC. The SmartDV s QDR4 memory model is fully compliant with stand...
18
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MDRAM Memory Model
MDRAM Memory Model provides an smart way to verify the MDRAM component of a SOC or a ASIC. The SmartDV s MDRAM memory model is fully compliant with st...
19
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RDRAM Memory Model
RDRAM Memory Model provides an smart way to verify the RDRAM component of a SOC or a ASIC. The SmartDV s RDRAM memory model is fully compliant with st...
20
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SDRAM Memory Model
SDRAM Memory Model provides an smart way to verify the SDRAM component of a SOC or a ASIC. The SmartDV s SDRAM memory model is fully compliant with st...
21
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IEC61162 Verification IP
IEC61162 Verification IP provides an smart way to verify Maritime navigation and Radio Communication equipment and systems when interconnected via an ...
22
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GENZ Verification IP
GENZ Verification IP provides an smart way to verify the GENZ bi-directional bus. The SmartDV s GENZ Verification IP is fully compliant with GENZ spec...
23
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RERAM Memory Model
RERAM Memory Model provides an smart way to verify the RERAM component of a SOC or a ASIC. The SmartDV s RERAM memory model is fully compliant with st...
24
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Serial PCRAM Memory Model
SERIAL PCRAM Memory Model provides an smart way to verify the SERIAL PCRAM component of a SOC or a ASIC. The SmartDV s SERIAL PCRAM memory model is fu...
25
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JESD207 Verification IP
The SmartDV s JESD207 verifies the Radio Front end-Baseband digital parallel interface.JESD207 VIP can be used to verify BBIC or RFIC following the JE...
26
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NFC Verification IP
NFC (Near Field Communication) Verification IP provides a smart way to verify the NFC, which is simple wireless communication between the close couple...
27
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SGRAM Memory Model
SGRAM Memory Model provides an smart way to verify the SGRAM component of a SOC or a ASIC. The SmartDV s SGRAM memory model is fully compliant with st...
28
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GHBM Memory Model
GHBM Memory Model provides an smart way to verify the GHBM component of a SOC or a ASIC. The SmartDV s GHBM memory model is fully compliant with stand...
29
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MHL Verification IP
MHL Verification IP is fully compliant with MHL Specification version 1.0. It includes an extensive test suite covering most of the possible scenarios...
30
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Qi Verification IP
Qi Verification IP provides a smart way to verify the Qi component of a SOC or a ASIC. The SmartDV s Qi Verification IP is fully compliant with standa...
31
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Fibre Channel Verification IP
Fibre Channel Verification IP provides an smart way to verify the Fibre channel MAC, PCS and serdes of a SOC or a ASIC. The SmartDV s Fibre Channel ve...
32
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Microsecond Channel (MSC) Verification IP
The MSC Verification IP is compliant with 2005-01-0057 specification and verifies MSC Bus interfaces. It includes an extensive test suite covering mos...
33
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MIL STD 1553 Verification IP
The MIL STD 1553 Verification IP is compliant with MIL STD 1553B specification and verifies MIL STD 1553 interfaces. It includes an extensive testsuit...
34
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MIL STD 1773 Verification IP
The MIL STD 1773 Verification IP is compliant with MIL STD 1773 specification and verifies MIL STD 1773 interfaces. It includes an extensive testsuite...
35
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TileLink Verification IP
TileLink Verification IP provides an smart way to verify the TileLink component of a SOC or a ASIC. The SmartDV s TileLink Verification IP is fully co...
36
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LIN Verification IP
Local Interconnect Network (LIN) is a single-wire, serial communication protocol based on the UART interface that is gaining popularity as a sub-bus s...
37
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MIPI DBI Verification IP
MIPI DBI Verification IP provides an smart way to verify the MIPI DBI bus. The SmartDV s MIPI DBI Verification IP is fully compliant with version 2.0 ...
38
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MIPI DPI Verification IP
MIPI DPI Verification IP provides an smart way to verify the MIPI DPI bus. The SmartDV s MIPI DPI Verification IP is fully compliant with version 2.0 ...
39
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MIPI DSI Verification IP
MIPI DSI Verification IP provides an smart way to verify the MIPI DSI bi-directional two-wire bus. The SmartDV s MIPI DSI Verification IP is fully com...
40
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MIPI I3C Verification IP
MIPI I3C Verification IP provides a smart way to verify the MIPI I3C bi-directional two-wire bus. The SmartDV s MIPI I3C Verification IP is fully comp...
41
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MIPI SPP Verification IP
The SmartDV Verification IP (VIP) for MIPI SPP provides an efficient and simple way to verify the MIPI SPP devices. The SmartDV VIP for MIPI SPP is fu...
42
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MIPI Virtual GPIO Interface (VGI) Verification IP
The MIPI VGI Verification IP is compliant with version 0.9 of Draft MIPI VGI specification and verifies MIPI VGI Bus interfaces. It includes an extens...
43
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BISS Verification IP
BISS Verification IP provides an smart way to verify the BISS component of a SOC or a ASIC. The SmartDV s BISS Verification IP is fully compliant with...
44
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SLC NAND Memory Model
SLC NAND Memory Model provides an smart way to verify the SLC NAND component of a SOC or a ASIC. The SmartDV s SLC NAND memory model is fully complian...
45
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RLDRAM Memory Model
RLDRAM Memory Model provides an smart way to verify the RLDRAM component of a SOC or a ASIC. The SmartDV s RLDRAM memory model is fully compliant with...
46
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RLDRAM2 Memory Model
RLDRAM2 Memory Model provides an smart way to verify the RLDRAM2 component of a SOC or a ASIC. The SmartDV s RLDRAM2 memory model is fully compliant w...
47
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RLDRAM3 Memory Model
RLDRAM3 Memory Model provides an smart way to verify the RLDRAM3 component of a SOC or a ASIC. The SmartDV s RLDRAM3 memory model is fully compliant w...
48
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SLVS-EC Verification IP
SLVS-EC is a high-speed serial communication protocol developed by Japan Industrial Imaging Association Standard to support the video data between CMO...
49
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AMBA 4 ACE Verification IP
AMBA 4 ACE Verification IP provides an smart way to verify the ARM AMBA 4 ACE component of a SOC or a ASIC. The SmartDV s AMBA 4 ACE Verification IP i...
50
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XMBus Verification IP
XMBus (Extended Management Bus) Verification IP provides an smart way to verify the XMBus bi-directional two-wire bus. The SmartDV s XMBus Verificatio...