Design & Reuse
Catalog of SIP Cores
System on Chip design resources
185 IP
51
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IEEE 1149.7 Compact JTAG (cJTAG) uVC
The cJTAG Universal Verification Component (uVC) verifies design blocks conforming to any of the six compliance levels defined by the IEEE standard, s...
52
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IEEE 1500 (SECT) eVC
The Standard for Embedded Core Test (SECT) eVC can verify a chain of one or more IEEE1500 compliant core wrappers. Whether developing a new test wrapp...
53
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Behavioral E3 Generator and Analyzer
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54
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Behavioral E3 over SONET Generator and Analyzer
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55
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SENT (SAE J2716) VIP
SmartDV's SENT Verification IP is a comprehensive solution for verifying the Single Edge Nibble Transmission automotive sensor interface, a one-way si...
56
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SENT Verification IP
Truechip's SENT Verification IP provides an effective & efficient way to verify the SENT components of an IP or SoC. Truechip's SENT VIP is fully comp...
57
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ReRAM VIP
SmartDV's ReRAM Verification IP is a comprehensive solution for verifying Resistive Random-Access Memory device interfaces, the emerging non-volatile ...
58
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Serial Front Panel Data Port (sFPDP) VIP
SmartDV's Serial Front Panel Data Port Verification IP is a comprehensive solution for verifying sFPDP, the low-overhead, low-latency, high-speed seri...
59
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JESD207 VIP
SmartDV's JESD207 Verification IP is a comprehensive solution for verifying the Radio Front End — Baseband Digital Parallel (RBDP) interface, the JEDE...
60
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JESD403 (Module Sideband Bus) VIP
SmartDV's JESD403 Verification IP is a comprehensive solution for verifying the JEDEC Module Sideband Bus (SidebandBus), the system management control...
61
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NFC VIP
SmartDV's NFC Verification IP is a comprehensive solution for verifying Near Field Communication interfaces, the 13.56 MHz short-range wireless commun...
62
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CFexpress VIP
SmartDV's CFexpress Verification IP is a comprehensive solution for verifying the CompactFlash Association CFexpress removable media interface, the pr...
63
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SGPIO Verification IP
Truechip's SGPIO Verification IP provides an effective & efficient way to verify the components interfacing with an IP or SoC. Truechip's SGPIO VIP is...
64
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SGPIO VIP
SmartDV's SGPIO Verification IP is a comprehensive solution for verifying the Serial General Purpose Input Output bus, the SFF Committee standard for ...
65
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MHL 2.0 Verification IP
MHL 2.0 VIP provides a simple yet powerful user interface which drastically reduces the time and effort needed to create a verification environment an...
66
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Qi VIP
SmartDV's Qi Verification IP is a comprehensive solution for verifying the Wireless Power Consortium Qi wireless charging standard, the dominant globa...
67
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RI5CY Verification IP
Truechip's RI5CY Verification IP provides an effective & efficient way to verify the components interfacing with RI5CY bus of a PULP microprocessor. I...
68
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Fibre Channel VIP
SmartDV's Fibre Channel Verification IP is a comprehensive solution for verifying the Fibre Channel high-speed serial storage network interface, the d...
69
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Microsecond Channel (MSC) VIP
SmartDV's Microsecond Channel Verification IP is a comprehensive solution for verifying the Microsecond Bus serial communication interface, an open-ma...
70
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Microwire VIP
SmartDV's Microwire Verification IP is a comprehensive solution for verifying the Microwire serial interface, the widely-adopted 3-wire half-duplex se...
71
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PIF bus matrix verification Platform
The VV9200 verification platform is a complete bus matrix and SoC verification environment. It is specifically designed for a Tensilica PIF bus and co...
72
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MIL-STD-1553 Verification IP
Truechip's Military Standard 1553 (MIL-STD-1553) Verification IP offers a streamlined and efficient solution for verifying Military Standard 1553 comp...
73
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MIL-STD-1553 VIP
SmartDV's MIL-STD-1553 Verification IP is a comprehensive solution for verifying the MIL-STD-1553 digital time division command/response multiplex dat...
74
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MIL-STD-1773 VIP
SmartDV's MIL-STD-1773 Verification IP is a comprehensive solution for verifying the fiber optic mechanization of the aircraft internal time division ...
75
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TileLink Verification IP
Truechip's TileLink Verification IP provides an effective & efficient way to verify the components interfacing with TileLink bus of an IP or SoC. It i...
76
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TileLink VIP
SmartDV's TileLink Verification IP is a comprehensive solution for verifying TileLink, the free and open chip-scale interconnect standard providing co...
77
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Simulation VIP for AMBA ATP
Cadence provides a comprehensive solution to address Arm® AMBA® Adaptive Traffic Profiles (ATP) specification. The ATP functionality is implemented as...
78
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Simulation VIP for AMBA DTI
Cadence provides a mature and comprehensive Verification IP (VIP)for theDistributed Translation Interface (DTI) specification, which is part of the Ar...
79
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Simulation VIP for AMBA LTI
Best-in-class Arm® AMBA® LTI Verification IP (VIP) for your IP, SoC, and system-level design testing. Cadence provides a mature and comprehensive Veri...
80
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Simulation VIP for CAN
Cadence provides a mature and comprehensive Verification IP (VIP) for the CAN (Controller Area Network) Protocol. The Cadence® Verification IP for CAN...
81
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Simulation VIP for CoaXPress
In production since 2018....
82
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Simulation VIP for DSC
The Cadence® Verification IP (VIP) for Display Stream Compression (DSC) provides an ability to perform comprehensive verification of DSC-related featu...
83
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Simulation VIP for eMMC
In production since 2011 on dozens of designs....
84
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Simulation VIP for Ethernet 5G Network
The Cadence® Verification IP (VIP) for Ethernet 5G Networking provides a mature, highly capable compliance verification solution for the 5G network pr...
85
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Simulation VIP for eUSB
The Cadence® Verification IP (VIP) for eUSB is a complete VIP solution for the Embedded USB2 (eUSB2) Physical Layer Supplement to the USB Revision 2.0...
86
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Simulation VIP for HDMI
In production since 2011 on many production designs....
87
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Simulation VIP for I2S
The Cadence® Verification IP (VIP) for I2S library is a ready-made, highly configurable VIP for the I2S protocol. It allows tests to be run in a pure ...
88
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Simulation VIP for JESD204
Cadence provides a mature and comprehensive Verification IP (VIP) for the JESD204 protocol. Incorporating the latest protocol updates, the Cadence® Ve...
89
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Simulation VIP for JTAG
The Cadence® JTAG Verification IP provides support for the JTAG protocol specification. It provides a mature, highly capable compliance verification s...
90
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Simulation VIP for MIPI SoundWire-I3S
Best-in-class MIPI® SoundWire-I3Ssm (SWI3S) Verification IP for your IP, SoC, and system-level design testing....
91
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Simulation VIP for PLB
In production since 2011....
92
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Simulation VIP for PMBus
Incorporating the latest protocol updates, the Cadence® Verification IP (VIP) for PMBus provides a complete bus functional model (BFM), integrated aut...
93
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Simulation VIP for Q-SPI
In production since 2018 for many production designs....
94
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Simulation VIP for SAS
The Cadence® Verification IP (VIP) for SAS is part of Cadence’s broad storage interface verification IP (VIP) portfolio. Serial Attached SCSI (SAS) ha...
95
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Simulation VIP for SD CARD and SDIO
In production since 2012 for many production designs....
96
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Simulation VIP for SMBus
Incorporating the latest protocol updates, the Cadence® Verification IP (VIP) for SMBus provides a complete bus functional model (BFM), integrated aut...
97
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Simulation VIP for SPDIF
Incorporating the latest protocol updates, the mature and comprehensive Cadence® Verification IP (VIP) for the SPDIF protocol provides a complete bus ...
98
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Simulation VIP for SPI
This Cadence® Verification IP (VIP) provides support for the SPI protocol. The SPI VIP provides a complete bus functional model (BFM) and integrated a...
99
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Simulation VIP for SPI NAND
In production since 2016 for many production designs....
100
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Simulation VIP for TileLink
This Cadence® Verification IP (VIP) provides support for the TileLink specification. It provides a highly capable compliance verification solution sim...