Design & Reuse
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643 IP
601
0.0
Ethernet AVB Verification IP
The Ethernet-AVB Verification IP is compliant with IEEE 802.3 and IEEE 1722 specifications. Ethernet Audio Video Bridging is an emerging IEEE 802.1 st...
602
0.0
Ethernet Preemption Verification IP
Truechip's Preemption Verification IP provides an effective & efficient way to verify the components interfacing with the Preemption interface of an I...
603
0.0
Ethernet TSN Verification IP
The Ethernet-TSN Verification IP is compliant with IEEE 802.3 specification. Ethernet Time Sensitive Networking is an emerging IEEE 802.1 standard des...
604
0.0
Ethernet Verification IP (10/100M, 1 / 10 / 25 / 40 / 50 / 100 / 200 / 400 / 800G)
Ethernet VIP provides a comprehensive verification solution featuring an advanced UVM environment that incorporates constrained random traffic generat...
605
0.0
ATMEL AT25DF161- SPI Serial Flash Memory VITAL Model
The VITAL AT25DF161 behavioral model is fully compliant to the 3687B-DFLASH-11/08 Specification of ATMEL, AT25DF161, 16-Megabit, SPI Serial Flash Memo...
606
0.0
Fully configurable Master, Slave or Monitor IP for verifying any AXI-based interface
Fully configurable Verification IP that emulates activity bus Master or Slave components, or independent compliance Monitors enables the verification ...
607
0.0
eUSB2 Verification IP
Truechip's eUSB2 Verification IP provides an effective & efficient way to verify the components supporting eUSB2 specification. Truechip's eUSB2 VIP i...
608
0.0
Avalon Verification IP
Avalon Interface Verification IP provides an smart way to verify the Avalon Interface component of a SOC or a ASIC. The SmartDV s Avalon Interface Ver...
609
0.0
AVCI (Advanced VCI) Verification IP
AVCI Verification IP provides an smart way to verify the AVCI component of a SOC or a ASIC. The SmartDV s AVCI Verification IP is fully compliant with...
610
0.0
BVCI (Basic VCI) Verification IP
BVCI Verification IP provides an smart way to verify the BVCI component of a SOC or a ASIC. The SmartDV s BVCI Verification IP is fully compliant with...
611
0.0
PVCI (Peripheral VCI) Verification IP
PVCI Verification IP provides an smart way to verify the PVCI component of a SOC or a ASIC. The SmartDV s PVCI Verification IP is fully compliant with...
612
0.0
NVDIMM-P Memory Model
NVDIMM P Memory Model provides an smart way to verify the NVDIMM P component of a SOC or a ASIC. The SmartDV s NVDIMM P memory model is fully complian...
613
0.0
NVM NVM Express 1.3c Verification IPVerification IP
Truechip’s NVM Express 1.3c Verification IP provides an effective & efficient way to verify the high performance queuing interface and command set opt...
614
0.0
UVM Verification Solution for Serial Flash Memories
The purpose of HSV 900 is to provide reusable verification solution for serial flash memories (such as Spansion S25FL). The verification environment i...
615
0.0
NVMe Verification IP
Non Volatile Memory Express, also known as NVMe is an interface specification built for accessing Solid State Drive (SSD) over PCIe. NVMe has revoluti...
616
0.0
NVMe VIP
Avery MVMe Test Environment Solution provides comprehensive verification featuring an advanced UVM environment that incorporates constrained random tr...
617
0.0
SWD (Serial Wire Debug) Verification IP
SWD(Serial Wire Debug) Verification IP provides an efficient and simple way to debug and trace functionality on processor cores and System on Chip (So...
618
0.0
Twin Quad NOR Flash Memory Model
Twin Quad NOR Flash Memory Model provides an smart way to verify the Twin Quad NOR Flash component of a SOC or a ASIC. The SmartDV s Twin Quad NOR Fla...
619
0.0
SWP (Single Wire Protocol) Verification IP
SWP Verification IP is a smart way to verify the SWP component of a SOC or ASIC. The SmartDV s SWP Verification IP is fully compliant with standard ET...
620
0.0
Excelon FRAM Memory Model
Excelon FRAM Memory Model provides an smart way to verify the Excelon FRAM component of a SOC or a ASIC. The SmartDV s Excelon FRAM memory model is fu...
621
0.0
AXI VIP (AXI4 + AXI4 Stream + ACE + AXI3)
AMBA-Xactor is proven VIP enabling SoC and IP developers to perform comprehensive functional verification of their IP and SOCs incorporating full rang...
622
0.0
AXI3/AXI4 Verification IP
...
623
0.0
CXL 3.0 Verification IP
Truechip's CXL Verification IP provides an effective & efficient way to verify the components interfacing with CXL interface of an IP or SoC....
624
0.0
CXL Switch Verification IP
Truechip's CXL Switch Verification IP provides an effective & efficient way to verify the components interfacing with CXL Switch interface of an IP or...
625
0.0
CXL VIP
Avery CXL and PCI Express VIP provides a comprehensive verification solution featuring an...
626
0.0
CXS a/b Verification IP
Truechip's CXS Verification IP provides an effective & efficient way to verify CXS ON Chip or OFF Chip interface. Truechip's CXS VIP is fully complian...
627
0.0
Hybrid Memory Cube (HMC 2.0) VIP
HMC-Xactor is a comprehensive memory VIP solution portfolio for Hybrid Memory Cube (HMC 2.0) targeting a new standard in memory performance, density, ...
628
0.0
Hybrid Memory Cube (HMC) Verification IP
HMC : Asiczen’s Verification IP for HMC provides a comprehensive set of protocol, methodology, verification and productivity features, enabling user t...
629
0.0
Hybrid Memory Cube Verification IP
Atria Logic Hybrid Memory Cube verification IP is a reusable, configurable verification component developed using SystemVerilog. The IP offers an easy...
630
0.0
Synopsys Verification IP for DDR4 (UDIMM, RDIMM, LDIMM)
Synopsys® VC VerificationIP for the JEDEC DDR4 memory protocol specification provides a comprehensive set of protocol, methodology, verification and p...
631
0.0
Synopsys Verification IP for LPDDR2
...
632
0.0
Synopsys Verification IP for LPDDR2
Synopsys® VC Verification IP for the JEDEC LPDDR2 memory protocol specification provides a comprehensive set of protocol, methodology, verification an...
633
0.0
Synopsys Verification IP for LPDDR3
Synopsys® VC VerificationIP for the JEDEC LPDDR3 memory protocol specification provides a comprehensive set of protocol, methodology, verification and...
634
0.0
Synopsys Verification IP for LPDDR4
Synopsys® VC Verification IP for the JEDEC LPDDR4 memory protocol specification provides a comprehensive set of protocol, methodology, verification an...
635
0.0
Synopsys Verification IP for UniPro
Synopsys® VC Verification IP for the MIPI Alliance UniPro protocol specification provides a comprehensive set of protocol, methodology, verification a...
636
0.0
Synthesizable DDR to MIG Bridge
...
637
0.0
Synthesizable DDR3 Bus Functional Model
...
638
0.0
Synthesizable DDR4 Bus Functional Model
...
639
0.0
Synthesizable LPDDR3 Bus Functional Model
...
640
0.0
Synthesizable LPDDR4 Bus Functional Model
...
641
0.0
Synthesizable MIPI I3C Bus Functional Model
...
642
0.0
HyperFlash Memory Model
HyperFlash Memory Model provides an smart way to verify the HyperFlash component of a SOC or a ASIC. The SmartDV s HyperFlash memory model is fully co...
643
0.0
HyperRAM Memory Model
HyperRAM Memory Model provides an smart way to verify the HyperRAM component of a SOC or a ASIC. The SmartDV s HyperRAM memory model is fully complian...