Design & Reuse
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arrow MIPI DigRF v4 (2)
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arrow MIPI LLI (1)
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arrow MIPI RFFE (3)
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arrow USB 2.0, USB 1.1 (5)
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arrow USB4 (4)
arrow Wide-IO (2)
arrow Other (280)
643 IP
351
0.0
JESD204C Verification IP
Truechip's JESD204C Verification IP provides an effective & efficient way to verify the components (data converters and/or logic devices) connecting w...
352
0.0
JESD204D Verification IP
Truechip's JESD204D Verification IP provides an effective & efficient way to verify the components (data converters and/or logic devices) connecting w...
353
0.0
JESD403 (Sideband Bus) Verification IP
The SmartDV Verification IP (VIP) for JESD403 provides an efficient and simple way to verify the JESD403 bidirectional two-wire serial interface. The ...
354
0.0
DFI-PHY 3.1 VIP
DDR-Xactor is a comprehensive memory VIP solution portfolio for DDR4/3, LPDDR3/2, RDIMM/LRDIMM, DFI-PHY used by SoC and memory controller designers us...
355
0.0
UFS 2.0 + UFSHCI 2.0 VIP
UFS-Xactor is a comprehensive VIP solution portfolio for UFS Host Controller (UFSHCI), UFS 2.0, and UME used by SoC and IP designers to ensure compreh...
356
0.0
1G Ethernet VerificationIP
Truechip’s 1G Ethernet Verification IP provides an effective & efficient way to verify...
357
0.0
SGPIO Verification IP
SGPIO (Serial GPIO) Bus Verification IP provides an smart way to verify the SGPIO bus. The SmartDV's SGPIO Verification IP is fully compliant with SFF...
358
0.0
SH1636 SERDES Gigabit Ethernet Transceivers, VITAL Model
The VITAL SH1636 behavioral model is fully compliant to the SH1636 Gigabit Ethernet transceiver. The SH1636 is a single chip, Gigabit Ethernet transce...
359
0.0
AHB + APB VIP
AMBA-Xactor is proven VIP enabling SoC and IP developers to perform comprehensive functional verification of their IP and SOCs incorporating full rang...
360
0.0
AHB bus matrix verification environment
The VV9000 verification platform is a complete bus matrix and SoC verification environment. It is capable of verifying a large variety of AHB/AXI base...
361
0.0
xHCI 1.1 Host Driver VIP
xHCI-Xactor is a comprehensive VIP solution portfolio for xHCI 1.1 and SS+ 3.1 and 2.0 used by SoC and IP designers to ensure comprehensive verificati...
362
0.0
AHCI 1.3 VIP
AHCI-Xactor is a comprehensive VIP solution portfolio for AHCI 1.3.1 used by SoC and IP designers to ensure comprehensive verification and protocol an...
363
0.0
xHCI Verification IP
Truechip's xHCI Verification IP targets the following three vendors:...
364
0.0
MHL 2.0 Verification IP
MHL 2.0 VIP provides a simple yet powerful user interface which drastically reduces the time and effort needed to create a verification environment an...
365
0.0
RI5CY Verification IP
Truechip's RI5CY Verification IP provides an effective & efficient way to verify the components interfacing with RI5CY bus of a PULP microprocessor. I...
366
0.0
Microwire Verification IP
Microwire Serial Interface is the serial synchronous communication protocol developed by National Semiconductor. Microwire Serial Interface VIP can be...
367
0.0
Wide Range VCC Flash Memory Model
Wide Range VCC Flash Memory Model provides an smart way to verify the Wide Range VCC Flash component of a SOC or a ASIC. The SmartDV s Wide Range VCC ...
368
0.0
PIF bus matrix verification Platform
The VV9200 verification platform is a complete bus matrix and SoC verification environment. It is specifically designed for a Tensilica PIF bus and co...
369
0.0
Gigabit Ethernet MAC SystemVerilog OVC Verification IP
Gigabit Ethernet Media Access Control (MAC) SystemVerilog OVC VIP is fully documented,off-the-shelf component for the Developers of the Gigabit Ethern...
370
0.0
Gigabit Ethernet MAC SystemVerilog OVM VIP
Gigabit Ethernet Media Access Control (MAC) SystemVerilog OVM VIP is fully documented, off-the-shelf component for the Developers of the Gigabit Ether...
371
0.0
Gigabit Ethernet Verification Component
The Gigabit Ethernet eVC can be used to verify any IEEE802.3:2000 and IEEE Draft P802.3ae/D4.0 compliant MAC or PHY device. The eVC can be used for th...
372
0.0
High Bandwidth Memory (HBM) Verification IP
HBM: HBM (High Bandwidth memory) is a high performance RAM interface for 3D-stacked DRAM. HBM has been adopted as industry standard by JEDEC. ...
373
0.0
TileLink Verification IP
Truechip's TileLink Verification IP provides an effective & efficient way to verify the components interfacing with TileLink bus of an IP or SoC. It i...
374
0.0
SIM Card Verification IP
The SmartDV s SIM Card Verification IP is fully compliant with Version ETSI-TS-100-977-V8.14.0 SIM Card Specification and verifies Sim Card interfaces...
375
0.0
Simulation VIP for AMBA ACE
Cadence provides a mature and comprehensive Verification IP (VIP) for the ACE specification which is part of the Arm® AMBA® family of protocols. Incor...
376
0.0
Simulation VIP for AMBA AHB
Cadence provides a mature and comprehensive Verification IP (VIP) for the AHB specification which is part of the Arm® AMBA® family of protocols. Incor...
377
0.0
Simulation VIP for AMBA APB
Cadence provides a mature and comprehensive Verification IP (VIP) for the Advanced Peripheral Bus (APB) specification, which is part of the Arm® AMBA®...
378
0.0
Simulation VIP for AMBA ATB
Cadence provides a mature and comprehensive Verification IP (VIP) for the Advanced Trace Bus (ATB) specification which is part of the Arm® AMBA® famil...
379
0.0
Simulation VIP for AMBA ATP
Cadence provides a comprehensive solution to address Arm® AMBA® Adaptive Traffic Profiles (ATP) specification. The ATP functionality is implemented as...
380
0.0
Simulation VIP for AMBA AXI
Cadence provides a mature and comprehensive Verification IP (VIP) for the AXI specification which is part of the Arm® AMBA® family of protocols. Incor...
381
0.0
Simulation VIP for AMBA CHI
Cadence provides a mature and comprehensive Verification IP (VIP) for the Coherent Hub Interface (CHI) specification, which is part of the Arm® AMBA® ...
382
0.0
Simulation VIP for AMBA CXS
Cadence provides a mature and comprehensive Verification IP (VIP) for the CXS specification which is part of the Arm® AMBA® family of protocols. Incor...
383
0.0
Simulation VIP for AMBA DTI
Cadence provides a mature and comprehensive Verification IP (VIP)for theDistributed Translation Interface (DTI) specification, which is part of the Ar...
384
0.0
Simulation VIP for AMBA LPI
Cadence provides a mature and comprehensive Verification IP (VIP) for the LPI specification which is part of the Arm® AMBA® family of protocols. Incor...
385
0.0
Simulation VIP for AMBA LTI
Best-in-class Arm® AMBA® LTI Verification IP (VIP) for your IP, SoC, and system-level design testing. Cadence provides a mature and comprehensive Veri...
386
0.0
Simulation VIP for AMBA Stream
Cadence provides a mature and comprehensive Verification IP (VIP) for the AXI4-Stream specification which is part of the Arm® AMBA® family of protocol...
387
0.0
Simulation VIP for AMBA SWD
The Cadence® Verification IP (VIP) for SWD provides support for the Serial Wire Debug protocol which is part of the Arm® Debug Interface Specification...
388
0.0
Simulation VIP for Bluetooth
Cadence Bluetooth Verification IP (VIP) is a part of the Cadence® wireless Verification IP portfolio. The Bluetooth VIP is compliant with the latest p...
389
0.0
Simulation VIP for CAN
Cadence provides a mature and comprehensive Verification IP (VIP) for the CAN (Controller Area Network) Protocol. The Cadence® Verification IP for CAN...
390
0.0
Simulation VIP for CCIX
Cadence provides a mature and comprehensive Verification IP (VIP) for the CCIX specification which is an open standard for a new class of server produ...
391
0.0
Simulation VIP for CoaXPress
In production since 2018....
392
0.0
Simulation VIP for CXL
The Cadence® Verification IP (VIP) for Compute Express Link (CXL) is part of the Cadence family of VIP for PCI Express® (PCIe®). Built on top of Caden...
393
0.0
Simulation VIP for DDR4
In production since 2011 on dozens of production designs....
394
0.0
Simulation VIP for DDR4 LRDIMM
First to market with full DDR4 LRDIMM support....
395
0.0
Simulation VIP for DDR5
In production since 2014 on dozens of production designs....
396
0.0
Simulation VIP for DDR5 DIMM
First to market with full DDR5 DIMM support....
397
0.0
Simulation VIP for DFI
Complete solution for extensive and fast verification used by multiple production designs....
398
0.0
Simulation VIP for DisplayPort
Used by market leaders driving the specification....
399
0.0
Simulation VIP for DSC
The Cadence® Verification IP (VIP) for Display Stream Compression (DSC) provides an ability to perform comprehensive verification of DSC-related featu...
400
0.0
Simulation VIP for eMMC
In production since 2011 on dozens of designs....