Design & Reuse
Catalog of SIP Cores
System on Chip design resources
480 IP
451
0.0
Avalon VIP
SmartDV's Avalon Verification IP is a comprehensive solution for verifying Intel's Avalon interface family, a widely adopted interconnect standard for...
452
0.0
LVDS Verification IP
Truechip's LVDS Verification IP provides an effective & efficient way to verify the LPC components of an IP or SoC. Truechip's LVDS VIP is fully compl...
453
0.0
LVDS VIP
SmartDV's LVDS Verification IP is a comprehensive solution for verifying the Low Voltage Differential Signal IQ data interface of the Microchip AT86RF...
454
0.0
Avery Verification IP and Compliance Test Suite
Why Avery Verification IP? Eliminate time spent developing and maintaining custom bus functional models (BFMs) or verification components. Avery Veri...
455
0.0
SVID VIP
SmartDV's SVID Verification IP is a comprehensive solution for verifying the Serial VID Interface, the Intel-developed serial protocol enabling proces...
456
0.0
NVM NVM Express 1.3c Verification IPVerification IP
Truechip’s NVM Express 1.3c Verification IP provides an effective & efficient way to verify the high performance queuing interface and command set opt...
457
0.0
NVMe Verification IP
Non Volatile Memory Express, also known as NVMe is an interface specification built for accessing Solid State Drive (SSD) over PCIe. NVMe has revoluti...
458
0.0
AVSBus 1.x VIP
SmartDV's AVSBus Verification IP is a comprehensive solution for verifying the Adaptive Voltage Scaling Bus protocol, a high-speed dedicated interface...
459
0.0
AVSBus 2.x VIP
SmartDV's AVSBus 2.0 Verification IP is a comprehensive solution for verifying the standalone Adaptive Voltage Scaling Bus 2.0 protocol, a significant...
460
0.0
AVSBus v1.4.1 Verification IP
Truechip's AVSBus Verification IP provides an effective and efficient way to verify the components interfacing with AVSBus interface of an IP and SOC....
461
0.0
AVSBus v2.0 Verification IP
Truechip's AVSBus Verification IP provides an effective and efficient way to verify the components interfacing with AVSBus interface of an IP and SOC....
462
0.0
AVSBus v2.1 Verification IP
Truechip's AVSBus Verification IP provides an effective and efficient way to verify the components interfacing with AVSBus interface of an IP and SOC....
463
0.0
SWD (Serial Wire Debug) VIP
SmartDV's SWD Verification IP is a comprehensive solution for verifying the ARM Serial Wire Debug interface, the two-pin low-pin-count alternative to ...
464
0.0
SWD Verification IP
Truechip's SWD Verification IP provides an effective & efficient way to verify the components interfacing with ARM Debug Interface. It is fully compli...
465
0.0
SWI3S v1.0
Truechip's SWI3S Verification IP provides an effective and efficient way to verify the components interfacing with SWI3S interface of an IP and SOC. T...
466
0.0
SWP VIP
SmartDV's SWP Verification IP is a comprehensive solution for verifying the Single Wire Protocol, the ETSI bit-oriented, point-to-point communication ...
467
0.0
AXI3/AXI4 Verification IP
...
468
0.0
CXL 3.0 Verification IP
Truechip's CXL Verification IP provides an effective & efficient way to verify the components interfacing with CXL interface of an IP or SoC....
469
0.0
CXL Switch Verification IP
Truechip's CXL Switch Verification IP provides an effective & efficient way to verify the components interfacing with CXL Switch interface of an IP or...
470
0.0
CXS a/b Verification IP
Truechip's CXS Verification IP provides an effective & efficient way to verify CXS ON Chip or OFF Chip interface. Truechip's CXS VIP is fully complian...
471
0.0
CXS c/d/Lite Verification IP
Truechip's CXS Verification IP provides an effective & efficient way to verify CXS ON Chip or OFF Chip interface. Truechip's CXS VIP is fully complian...
472
0.0
Hybrid Memory Cube (HMC) Verification IP
HMC : Asiczen’s Verification IP for HMC provides a comprehensive set of protocol, methodology, verification and productivity features, enabling user t...
473
0.0
Hybrid Memory Cube Verification IP
Atria Logic Hybrid Memory Cube verification IP is a reusable, configurable verification component developed using SystemVerilog. The IP offers an easy...
474
0.0
Synopsys Verification IP for DDR4 (UDIMM, RDIMM, LDIMM)
Synopsys® VC VerificationIP for the JEDEC DDR4 memory protocol specification provides a comprehensive set of protocol, methodology, verification and p...
475
0.0
Synopsys Verification IP for LPDDR2
...
476
0.0
Synopsys Verification IP for LPDDR2
Synopsys® VC Verification IP for the JEDEC LPDDR2 memory protocol specification provides a comprehensive set of protocol, methodology, verification an...
477
0.0
Synopsys Verification IP for LPDDR3
Synopsys® VC VerificationIP for the JEDEC LPDDR3 memory protocol specification provides a comprehensive set of protocol, methodology, verification and...
478
0.0
Synopsys Verification IP for LPDDR4
Synopsys® VC Verification IP for the JEDEC LPDDR4 memory protocol specification provides a comprehensive set of protocol, methodology, verification an...
479
0.0
Synopsys Verification IP for UniPro
Synopsys® VC Verification IP for the MIPI Alliance UniPro protocol specification provides a comprehensive set of protocol, methodology, verification a...
480
0.0
HyperBus VIP
SmartDV's HyperBus Verification IP is a comprehensive solution for verifying the HyperBus low signal count, high-performance DDR bus interface for con...