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New Verification IP
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Display Port 2.0 Verification IP
- Full Display port 2.0 source device and sink device functionality.
- Supports backward compatibility with previous versions upto DPv1.4a
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Flash Octal SPI (OSPI) Verification IP
- Supports Extended SPI mode as well as Octal SDR and DDR mode (Single I/O and Octal I/O)
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DisplayPort 2.0 Verification IP (VIP)
- Plugs into existing verification environments
- Rapid testbench integration reduces time to first test
- Incorporates expertise acquired through many prior applications
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TPM Verification IP
- Full TPM master device and slave device functionality.
- Compliant to the Trusted Computing Group (TCG) Trusted Platform Module(TPM) Version 1.1b/1.2 and 2.0 Specification
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GDDR6 UVM Verification IP
- Fully compliance with JEDEC Specification JESD250A.
- Support DQ data rate up to 12 Gbps per pin.
- Support Low powe mode features.
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USB4 Verification IP (VIP)
- Support verification of all protocol layers and configurations
- Callback-based error injection capability for creation of illegal stimulus from the VIP.
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VC Verification IP for CPRI
- CPRI specification 7.0
- Single agent, can be configured as RE or REC
- Multiple ports, with master or slave characteristics
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GDDR7 Memory Model
- Supports GDDR7 memory devices from all leading vendors.
- Supports 100% of GDDR7 protocol draft JEDEC specification.
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TileLink Verification IP
- Supports TileLink Master, TileLink Slave, TileLink Interconnect, TileLink Monitor and TileLink Checker.
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Ethernet-TSN Verification IP
- Faster testbench development and more complete verification of Ethernet-TSN designs
- Easy to use command interface simplifies testbench control and configuration of TX and RX
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Gen Z Verification IP
- Multiple Physical Layers supported which can be selected as per medium
- Capable of Power Management and support for all low power states
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SD Card Verification IP
- Compatible with all the versions V1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 6.10, 7.00
- Supports all Capacity of Memory i.e.
- Standard Capacity SD Memory Card (SDSC)
Top Verification IP
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1
Serial Peripheral Interface Verification IP
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2
PCIe End Point UVM Verification IP
- Independently controlled egress, ingress traffic, and support for all types of packets.
- PCIe and legacy interrupt support.
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3
UART UVM Verification IP
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4
AXI4-Lite UVM/OVM SV based Master Verification IP
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5
MIPI CSI-2 with C phy Verification IP
- Compliant to MIPI CSI-2 Interface Specification version 1.1 and MIPI D-PHY version 1.1
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6
Display Port 2.0 Verification IP
- Full Display port 2.0 source device and sink device functionality.
- Supports backward compatibility with previous versions upto DPv1.4a
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Wireless MAC Verification IP (VIP)
- Compliant with specification version 802.11n. 802.11n WLAN specification is developed and maintained by IEEE.
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Source Code Test Suites PCIe
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9
Unipro + M-PHY VIP
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10
AXI VIP (AXI4 + AXI4 Stream + ACE + AXI3)
- Comprehensive support for AMBA AXI3, AXI4, AXI4-Lite, AXI4 Stream, and ACE including BFMs for master, slave, and N-port interconnect
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Gigabit Ethernet MAC SystemVerilog OVC Verification IP
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12
MIPI DSI Verification IP with Compliance testsuite
¹ Top Verification IP Over the Last Two Weeks (Last update: Aug. 18)
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