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Thursday, April 2, 2026

• Nvidia invests $2bn in Marvell for AI ASIC compatibility
• Ex-Tenstorrent Execs Start Cloud Provider, AI Lab in Japan
• Siemens joins European Space Agency’s EPIC initiative to empower European startups
• Silvaco Announces Strategic Partnership with APEC to Advance Silicon Carbide Power Device Development
• Can Synopsys' Design IP Business Return to Growth in Fiscal 2026?
• Keysight Unveils Next-Generation In-Vehicle Network Test Solutions at Automotive Ethernet Congress 2026
• EDGEAI to Revolutionize Smart Metering with BrainChip Akida 2 License
• EnSilica selected for UK CHERI Adoption Collective
• Samsung Readies PCIe 5.0 QLC SSD with a Custom RISC-V Controller
• Synopsys Brings Agentic Engineering Into Focus as AI-Driven Design Tests Productivity Limits
• QuickLogic Announces Contract for High Density eFPGA Hard IP Optimized for Intel 18A
• Silicon Photonics Race Intensifies as TSMC Targets 2026 COUPE Production, Samsung Eyes 2029 CPO Turnkey
• Samsung Electronics Launches Silicon Photonics Foundry Business

Wednesday, April 1, 2026

• China’s top chip foundry SMIC unveils action plan for seizing new growth opportunities
• TSMC is preparing to launch the manufacturing of next-generation chips in Japan
• South Korea Unveils $6.5B Strategy to Boost AI, Semiconductor and Strategic Technologies
• NVIDIA AI Ecosystem Expands as Marvell Joins Forces Through NVLink Fusion
• Qualitas Semiconductor Licenses 2nm Process-Based MIPI C/D-PHY IP to U.S. Edge AI SoC Company

Tuesday, March 31, 2026

• Analog & Mixed-Signal IP Licensing Deal with Tier-1 Korean Customer - T2M Expands Global Reach!

Monday, March 30, 2026

• China plan for 80% semiconductor self-sufficiency
• GlobalFoundries Files Patent Infringement Lawsuits Against Tower Semiconductor to Protect High-Performance American Chip Innovation
• TSMC Widens Market Share Gap with Samsung While Foundry Market Nears $170 Trillion
• Weebit Nano announces A$80.0 million Placement
• Siemens launches Teamcenter Digital Reality Viewer and Digital Twin Composer in India
• Credo Launches 800G ZeroFlap Optical Transceivers Engineered for AI Networks
• Security IP Market Accelerates as OEM Demand for Integrated, Certification-Ready Components Surges
• Altera and Arm Collaborate to Deliver Efficient, Programmable Solutions for AI Data Centers
• Innatera Launches Synfire to Unify the Neuromorphic Ecosystem and Accelerate Real-World Edge AI Deployment
• These AI Workstations Look Like PCs, but Pack a Stronger Punch
• Arm expands compute platform to silicon products in historic company first
• Switzerland is at the centre of a quiet rebellion in chip design
• JEDEC® Releases Updated LPDDR5/5X SPD Standard with Enhanced Mode‑Switching Support

Thursday, March 26, 2026

• TES unveils a next-generation Elliptic Curve Digital Signature Algorithm (ECDSA) IP Core for Secure IoT, Blockchain, and Industrial Systems
• Imec names NVIDIA’s Jensen Huang as recipient of the 2026 imec Lifetime of Innovation Award
• STMicroelectronics China-manufactured STM32 microcontrollers begin volume production
• Cadence Recognized as a Platinum Employer on the Where You Work Matters List
• Pioneering Silicon Valley Innovator Joins Aion Silicon as Engineering VP
• Cadence and NVIDIA Unveil Accelerated Engineering Solutions Purpose-Built for Agentic AI Chip and System Design​
• Alibaba delivers RISC-V server chip optimized to run China’s top AI models
• Reliable performance with RISC-V: Why architecture, microarchitecture and compilers must work together
• Synopsys Supports New Arm AGI CPU with Full-Stack Design Solutions
• Memory Is the New Bottleneck in AI Semiconductors
• Faraday Highlights 40nm SONOS eNVM as NOR Flash Alternative for MCU Designs
• Siemens launches Teamcenter Digital Reality Viewer and Digital Twin Composer in India
• Verification Engineers Are Poised to Become Verification Scientists
• Scoping out the chiplet-based design flow
• Chiplets: 8 best practices for engineering multi-die designs
• CEA-Leti and Fraunhofer IPMS Validate Wafer Exchange for Ferroelectric Memory Materials Within the FAMES Pilot Line

Wednesday, March 25, 2026

• Arteris Named to Fast Company’s Annual List of the World’s Most Innovative Companies of 2026

Tuesday, March 24, 2026

• Arteris Network-on-Chip IP Deployed in Renesas’ Next-Gen R-Car Automotive Technology
• CAST Introduces PDM-to-PCM IP Core for Easy Interfacing of Digital Microphones with SoCs
• TDE000S – Secure, Compact RISC-V IP Core Processing

Monday, March 23, 2026

• Jmem Tek Joins GlobalFoundries Ecosystem to Expand Post-Quantum Security Solutions
• Synopsys' vision for engineering the future
• India Making Significant Progress Toward Semiconductor Workforce Development Under C2S
• Samsung and AMD Expand Strategic Collaboration on Next-Generation AI Memory Solutions
• Siemens Invests More Than $165 Million to Expand Manufacturing Across the Carolinas, Supporting U.S. Data Center Growth
• IntoPIX Titanium Apps Achieve IPMX Certification
• Keysight Launches SBOM Manager to Help Organizations Prepare for Emerging Global Cybersecurity Regulations
• AimFuture and ITM Semiconductor to Develop AI-Integrated Technology for Robotics and Mobility
• ForwardEdge ASIC Selects BrainChip’s Neuromorphic Computing for Future ASICs
• Synopsys expands AI chip design stack with hardware-assisted verification, tightening development timelines
• NVIDIA and Global Industrial Software Giants Bring Design, Engineering and Manufacturing Into the AI Era