Design & Reuse
95 IP
1
100.0
Multi-protocol SerDes PMA - PCIe1 PCIe2 PCIe3 PCIe4 PCIe5 and more
Multiprotocol SerDes PMA supporting variety of interfaces....
2
100.0
Multi-protocol SerDes PMA in FDSOI (GF22FDX FDX 22FDX) - PCIe1 PCIe2 PCIe3 PCIe4 and more
Multiprotocol SerDes PMA supporting variety of interfaces....
3
50.0
32G Multi Rate SerDes PHY - GlobalFoundries 22FDX
Extoll’s SerDes architecture is based on digital design elements and methodologies. Plain analog blocks are only used where absolutely necessary. Vari...
4
50.0
USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 22ULP
The PHY combo comprises Serial ATA (SATA) compliant with SATA 3.0 Specification, Peripheral Component Interconnect Express (PCIe) compliant with PCIe ...
5
45.0
32G Multi Rate Long Reach SerDes PHY - GlobalFoundries 12LP and 12LPP
Extoll’s SerDes architecture is based on digital design elements and methodologies. Plain analog blocks are only used where absolutely necessary. Vari...
6
45.0
32G Multi Rate Very Short Reach SerDes PHY - GlobalFoundries 12LP and 12LPP
Extoll’s SerDes architecture is based on digital design elements and methodologies. Plain analog blocks are only used where absolutely necessary. Vari...
7
17.0
56Gbps LR SerDes IP on TSMC 16/12nm
Credo is a world leading SerDes Technology Company offers silicon proven SerDes IP from 1G to 112G data rates. Features include the lowest power i...
8
17.0
56Gbps LR SerDes IP on TSMC 7nm
Credo is the world leading SerDes Technology. SerDes PMA is silicon proven IP offers in TSMC 7nm processes. Features include excellent insertion loss...
9
17.0
28Gbps LR SerDes IP on TSMC 28nm
Credo is the world leading SerDes Technology Company offers silicon proven SerDes IP from 1G to 112G data rate. Features include excellent insertio...
10
17.0
28Gbps MR SerDes IP on TSMC 28nm
Credo is the world leading SerDes Technology Company offers silicon proven SerDes IP from 1G to 112G data rates. This SerDes PMA is silicon proven...
11
14.0
Multi Standard programmable SERDES PHY with single/multi-lane configurations with support of long-reach channel
This 12.5Gbps SERDES IP is designed for smooth integration of Multiple SERDES lanes offering best in class performance, area and power. The programmab...
12
12.0
Serial ATA (SATA) I/II PHY IP CORE
SMS6000 is a Serial ATA gen I and gen II compliant PHY IP which supports SAPIS and Serial Attached SCCI (SAS) specifications both at 1.5 Gbp/s and 3.0...
13
10.0
SATA 3 PHY
Gigacom's VSL340A PHY updated version of VSL340 to support SATA3 and backward compatible with SATA 1 and 2. VSL340A is suitable for both Host and Devi...
14
5.0
SAS Initiator, 12G, 4 Ports, 48 Gbps, SATA Host
The SAS Initiator Controller IP Core provides an interface to high-speed serial link replacement for the parallel SCSI attachment of mass storage devi...
15
5.0
SATA PHY
Gigacom's VSL340 PHY is suitable for both Host and Device applications within a Serial ATA system. The VSL340 PHY operates to the Serial ATA specifica...
16
5.0
SATA/SAS 3.0 PHY
With sophisticated architecture and advanced technology, KNiulink SATA/SAS transceiver IP with PMA and PCS layer is designed for low power and high pe...
17
4.0
SATA "Y" Bridge
The IntelliProp SATA "Y" Bridge design (IPP-SA111A-BR) provides SATA compliant connections per SATA-IO 3.3 and a standard SATA interface to access dri...
18
4.0
SATA "Y" RAID Bridge without NCQ
The IntelliProp IPP-SA112A-BR SATA “Y” Bridge with RAID design provides SATA compliant connections and a standard SATA interface that performs RAID0 t...
19
4.0
SATA 1-to-1 Speed Bridge with Sandbox
The IntelliProp SATA 1-to-1 Speed Bridge with Sandbox (IPP-SA110A-BR) design provides SATA compliant connections to a SATA host and a SATA device. The...
20
4.0
SATA Bridge Platform (Optional: AES, Hardware Datapath)
The IntelliProp SATA Bridge Platform is an extensible IP Core which encompasses a SATA Device core, a SATA Host core, along with an embedded processor...
21
4.0
SATA Device ADCI Core
IntelliProp’s SATA Device ADCI core (IPC-SA155A-DT) is an industry standard Serial-ATA (SATA) device interface core that allows companies to build hig...
22
4.0
SATA Host AHCI Core
The IntelliProp SATA Host AHCI (IPC-SA156A-HI) is an industry standard Serial-ATA (SATA) host interface core that enables customers to use high throug...
23
4.0
SATA Host App Core
IntelliProp’s SATA host core (IPC-SA101A-HI) is an industry standard Serial-ATA (SATA) host interface core that enables host application companies to ...
24
4.0
SATA RAID Core
The IntelliProp IPC-BL109A-RD SATA RAID Core is a hardware design block written in HDL that performs RAID 0 operations to provide higher performance a...
25
4.0
NVMe-to-SATA Bridge
The IntelliProp IPP-NV186A-BR is an NVMe-to-SATA Bridge that utilizes the IntelliProp NVMe Target IP Core and the IntelliProp SATA AHCI Host Core to c...
26
3.0
Multi-Link Multi-Protocol SerDes 10Gbps in GF 28SLP
Terminus Circuits offers low power, low latency Multistandard SerDes in TSMC 28nm process node to support wide range of standards like PCI Express, SA...
27
3.0
Multi-Link Multi-Protocol SerDes 10Gbps in TSMC 55LP
Terminus Circuits offers low power, low latency Multistandard SerDes in TSMC 28nm process node to support wide range of standards like PCI Express, SA...
28
3.0
Multi-Link Multi-Protocol SerDes 10Gbps in TSMC 65GP
Terminus Circuits offers low power, low latency Multistandard SerDes in TSMC 28nm process node to support wide range of standards like PCI Express, SA...
29
3.0
Multi-Link Multi-Protocol SerDes 16Gbps in TSMC 28HPC
Terminus Circuits offers low power, low latency Multistandard SerDes in TSMC 28nm process node to support wide range of standards like PCI Express, SA...
30
2.0
SATA 2 HOST ON CYCLONE 5 GX
The LDS SATA 2 HOST_C5GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Match FIFO on a ALTERA Cyclone V GX FPGA. The...
31
2.0
SATA 3 Host Controller on ARRIA V FPGA
The LDS SATA 3 HOST AR5GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA Stratix IV GX FPGA. T...
32
2.0
SATA 3 Host Controller on Xilinx Artix 7
The LDS SATA 3 HOST XA7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Artix 7 speed grade 2 FPGA. The LDS_SATA3_HO...
33
2.0
SATA 3 Host Controller on ZYNQ
The LDS SATA 3 HOST XZ7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Zynq speed grade 2 FPGA. The LDS SATA 3 HOST...
34
2.0
SATA 3 HOST IP on ARRIA 10 FPGA
The LDS-SATA3-HOST-A10GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Match FIFO on a INTEL ARRIA 10 GX FPGA. The L...
35
2.0
SATA Device Controller on Altera Arria II GX
The LDS SATA DEVICE AR2GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA ARRIA II GX FPGA. The...
36
2.0
SATA Device Controller on Kintex 7
The LDS SATA 3 DEVICE XK7 IP incorporates the Command Layer, Transport layer, the Link layer and the PHY layer on a Xilinx Kintex 7 FPGA. The LDS SATA...
37
2.0
SATA Device on Stratix IV GX
The LDS SATA DEVICE STR4GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA STRATIX IV GX FPGA. ...
38
2.0
SATA Device on Virtex 6
The LDS SATA DEVICE XV6 IP incorporates the Command Layer, Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 6 FPGA. The LDS SATA D...
39
2.0
SATA HOST 3 ON KINTEX 7 Ultrascale
The LDS SATA 3 HOST XK7U IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Kintex 7 Ultrascale speed grade 2 FPGA. The...
40
2.0
SATA HOST 3 ON VIRTEX 7 GTH
...
41
2.0
SATA Host 6G Controller on Kintex 7
The LDS SATA 3 HOST XK7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Kintex 7 speed grade 2 FPGA. The LDS SATA 3 ...
42
2.0
SATA Host Controller
The LDS SATA HOST STR4GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA Startix IV GX FPGA. Th...
43
2.0
SATA HOST Controller on Cyclone IV GX
The LDS SATA HOST C4GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA Cyclone IV GX FPGA. The ...
44
2.0
SATA Host Controller on Spartan 6 LXT FPGA
The LDS SATA HOST SP6 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Spartan 6 FPGA. The LDS SATA HOST SP6 IP is co...
45
2.0
SATA Host controller on Virtex 5 FXT
The LDS SATA HOST XF5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA. The LDS SATA HOST XV5 IP is com...
46
2.0
SATA Host Controller on Virtex 6 LXT
The LDS SATA HOST XV6 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 6 FPGA. The LDS SATA HOST XV6 IP is com...
47
2.0
SATA Host on Altera Arria II GX
The LDS SATA HOST AR2GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA ARRIA II GX FPGA. The L...
48
2.0
SATA Host on Xilinx Zynq Artix 7
The LDS SATA 3 HOST XA7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Artix 7 speed grade 2 FPGA. The LDS SATA 3 H...
49
2.0
SATA HOST Synchronous IP
The LDS SATA HOST XV5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA. The LDS SATA HOST XV5 IP is com...
50
2.0
SATA III HOST Controller on Virtex 6
The LDS SATA 3 HOST XV6 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 6 speed grade 2 FPGA. The LDS SATA 3 ...