Search News

Design Platform News

• Technology combinations for complex chip (Friday, August 30, 2024)
• Siemens brings industry leading Capital electrical and electronic systems design software to the cloud as a service (Friday, August 30, 2024)
• Silvaco's Fab Technology Co-Optimization (FTCO): From Atoms to Systems (Tuesday, August 20, 2024)
• Welcome to Silicon-to-Systems Space (Where No One Can Hear You Scream) (Thursday, August 15, 2024)
• AutoChips integrated multiple VeriSilicon's IPs in its intelligent cockpit domain control SoC (Wednesday, August 14, 2024)
• BAE Systems Partners with Siemens for Industry 4.0 Revolution (Tuesday, July 30, 2024)
• Tessolve partners with SigmaSense to develop their innovative DSP-based sensing ASIC (Monday, July 29, 2024)
• Imec achieves record-low charge noise for Si MOS quantum dots fabricated on a 300mm CMOS platform (Wednesday, July 24, 2024)
• C-DAC partners with MosChip and Socionext for design of HPC Processor AUM based on Arm architecture (Monday, July 1, 2024)
• Creating a Center of Excellence for IC Design (Sunday, June 30, 2024)
• EDA Companies Unite With Samsung for AI and 3D IC Technology (Saturday, June 29, 2024)
• Siemens introduces Innovator3D IC - a comprehensive multiphysics cockpit for 3D IC design, verification and manufacturing (Monday, June 24, 2024)
• Siemens gets certification for Solido SPICE on Intel nodes, and adds EMIB (Monday, June 24, 2024)
• True Circuits Introduces the JSPICE™ Design Environment (JDE™) at the Design Automation Conference (Sunday, June 23, 2024)
• lowRISC and Microsoft Collaborate to Help Bring the Revolutionary CHERIoT-Ibex Core to Production Grade (Wednesday, June 19, 2024)
• Alphawave Semi to Showcase Next-Generation PCIe® 7.0 IP Platform for High-Performance Connectivity and Compute at PCI-SIG® DevCon 2024 (Tuesday, June 11, 2024)
• Sondrel offers leading edge chip design teams (Sunday, June 9, 2024)
• Sigasi Redefines Chip Design Creation, Integration, Validation Leveraging Shift-Left Principles (Thursday, June 6, 2024)
• Mobiveil's PSRAM Controller IP Lets SoC Designers fully Leverage AP Memory's Ultra High Speed (UHS) PSRAM Memory (Thursday, June 6, 2024)
• Efabless Welcomes Weebit Nano's ReRAM to Its Custom Chip Design Platform (Thursday, June 6, 2024)
• Siemens announces breakthroughs in high-level verification of C++ (Wednesday, June 5, 2024)
• New LZ4 & Snappy IP Core from CAST Enables Fast Lossless Data Decompression (Monday, June 3, 2024)
• SureCore announces low power cryogenic memory technology that could help dramatically cut data centre power usage (Monday, June 3, 2024)
• UK digital twin leader joins Siemens Xcelerator (Monday, June 3, 2024)
• Frontgrade Technologies Selected by MDA Space as Part of MDA AURORA™ Supply Chain (Monday, June 3, 2024)
• Silicon-Proven 14-Bit 4.32 GSps Wide Band ADC IP core Time-Interleaved Pipeline Solution Now Available for Whitebox Licensing with No Royalty (Sunday, June 2, 2024)
• OPENEDGES' Memory Subsystem IPs Selected by ASICLAND for Next-gen AI Applications (Thursday, May 30, 2024)
• Startup offers low-cost neuromorphic quantum computing (Thursday, May 30, 2024)
• Dolphin Design teams up with Raspberry Pi for advanced chip power management (Sunday, May 26, 2024)
• MerlinTPS Partners with Bluespec to Provide Urgently Needed GPS Augmentation and Backup Without Satellites (Sunday, May 26, 2024)
• Weebit Nano and Efabless collaborate to enable easy, affordable prototyping of innovative SoC designs (Thursday, May 23, 2024)
• HCLTech Forges Ahead in Engineering Services to global Communication Services Providers (CSPs) with purchase of Communications Technology Group assets from Hewlett Packard Enterprise (HPE) (Wednesday, May 22, 2024)
• S2C and Sirius Wireless Collaborate on Wi-Fi 7 RF IP Verification System (Tuesday, May 21, 2024)
• JEDEC Reveals Massive Speed Boosts For Next-Gen DDR6 And LPDDR6 Memory (Tuesday, May 21, 2024)
• Analog Bits Joins the Silicon Catalyst In-Kind Partner Ecosystem (Tuesday, May 21, 2024)
• Why verification matters in network-on-chip (NoC) design (Monday, May 20, 2024)
• JEDEC Confirms CAMM2 Memory For Desktop PCs: DDR6 Up To 17.6 Gbps & LPDDR6 Up To 14.4 Gbps (Monday, May 20, 2024)
• Crucial role for imec in EU Chips Act (Monday, May 20, 2024)
• Qualitas Semiconductor expands presence in chinese market through strategic partnership with chinese chip design company (Sunday, May 19, 2024)
• Defacto SoC Compiler performance on AWS Graviton3 (Thursday, May 16, 2024)
• ADTechnology and ANAFLASH to Team Up for Embedded Vision Summit (EVS) showcase (Monday, May 13, 2024)
• Silicon Proven PCIe 5.0 PHY and Controller IP Cores in 12nm to Revolutionize Connectivity solutions (Sunday, May 12, 2024)
• NEO Semiconductor Reveals a Performance Boosting Floating Body Cell Mechanism for 3D X-DRAM during IEEE IMW 2024 (Sunday, May 12, 2024)
• Demonstrating the UCIe Chiplet Interconnect (Sunday, May 12, 2024)
• TSMC Certifies a Host of Top EDA Tools for New Process Nodes (Tuesday, May 7, 2024)
• Siemens delivers end-to-end silicon quality assurance for next-generation IC designs with new Solido IP Validation Suite (Monday, May 6, 2024)
• Announcing Availability of Silicon-Proven 12bit 1Msps SAR ADC IP Core for Whitebox Licensing with Royalty Free (Sunday, May 5, 2024)
• Fabless semiconductor startup Mindgrove launches India's first indigenously designed commercial high-performance MCU chip (Sunday, May 5, 2024)
• Zhuhai Chuangfeixin: OTP IP Based on 55nm High-Voltage Process Successfully Qualified for Listing (Sunday, May 5, 2024)
• PCI-SIG® Announces CopprLink™ Cable Specifications for PCIe® 5.0 and 6.0 Technology (Wednesday, May 1, 2024)