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• Efabless Announces the Release of the OpenLane 2 Development Platform, Transforming Custom Silicon Design Flows (Thursday, April 18, 2024)
• Cadence Collaborates with MemVerge to Increase Resiliency and Cost-Optimization of Long-Running High-Memory EDA Jobs on AWS Spot Instances (Wednesday, April 17, 2024)
• Dolphin Design expands GoAsic partnership to enhance the semiconductor Industry's Supply Chain (Wednesday, April 17, 2024)
• Cadence Announces Most Comprehensive True Hybrid Cloud Solution to Provide Seamless Data Access and Management (Wednesday, April 17, 2024)
• Demonstration of Weebit ReRAM on GF 22FDX® Wafers at EW24 (Wednesday, April 17, 2024)
• Cadence Unveils Palladium Z3 and Protium X3 Systems to Usher in a New Era of Accelerated Verification, Software Development and Digital Twins (Tuesday, April 16, 2024)
• JEDEC Updates JESD79-5C DDR5 SDRAM Standard: Elevating Performance and Security for Next-Gen Technologies (Tuesday, April 16, 2024)
• Zhuhai Chuangfeixin: OTP IP Based on 90nm CMOS Image Sensor Process Technology Successfully Mass-Produced (Tuesday, April 16, 2024)
• Movellus Extends Droop Management Leadership with Aeonic Generate™ AWM3 (Monday, April 15, 2024)
• Siemens and Microsoft to converge Digital Twin Definition Language with W3C Thing Description Standard (Sunday, April 14, 2024)
• Khronos Releases OpenXR 1.1 to Further Streamline Cross-Platform XR Development (Sunday, April 14, 2024)
• Unveiling Silicon-proven USB 3.0 PHY IP Core in 22nm, Elevating High-Speed Data Transmission with Advanced Transceiver Technology, backward compatible with USB 2.0 (Sunday, April 14, 2024)
• Logic Fruit Technologies Inc. Excitedly Welcomes Mr. Akshaya Sharma as the new CEO of US Operations (Thursday, April 11, 2024)
• Creonic GmbH Introduces Fast Fourier Transform IP Core (Thursday, April 11, 2024)
• AI-Driven HBM Uptake Is Power-Sensitive (Monday, April 8, 2024)
• Silicon-Proven 12-Bit 5Msps ADC IP Core for High-Speed Data Conversion, Now Available for Licensing (Sunday, April 7, 2024)
• sureCore announces low power memory compiler for 16nm FinFET (Wednesday, April 3, 2024)
• Intel and Synopsys Reveal First Heterogeneous Chiplet Design Based on UCIe Does This Chip Hold the Future of the Semiconductor Industry? (Tuesday, April 2, 2024)
• Defacto part of ArmÂ’s Partner Catalog (Tuesday, April 2, 2024)
• Microsoft-Funded Quantum Startup Plants Flags in Europe (Monday, April 1, 2024)
• Bright minds wanted for chip design in Europe (Tuesday, March 26, 2024)
• New fabrication process, a major advance towards quantum computing (Tuesday, March 26, 2024)
• Samsung Demonstrates New CXL Capabilities and Introduces New Memory Module for Scalable, Composable Disaggregated Infrastructure at Memcon 2024 (Monday, March 25, 2024)
• Faraday Partnered with SONIX to Create a New Product Featuring Its SONOS eFlash Solution (Monday, March 25, 2024)
• Alphawave Semi and InnoLight Collaborate to Demonstrate Low Latency Linear Pluggable Optics with PCIe 6.0® Subsystem Solution for High-Performance AI Infrastructure at OFC 2024 (Monday, March 25, 2024)
• CoreHW, in Partnership with Unikie, Introduces a Novel RTLS Technology that Significantly Enhances Power Efficiency and Positioning Accuracy (Sunday, March 24, 2024)
• Synopsys Strengthens Polaris Software Integrity Platform with New Dynamic Security Testing Capabilities (Monday, March 18, 2024)
• HCLTech and CAST expand partnership for custom chips (Monday, March 18, 2024)
• Spectral Releases Advanced Quality Assurance & Data Analytics tool to validate advanced node Memory Compilers (Monday, March 18, 2024)
• Revolutionary Cadence Reality Digital Twin Platform to Transform Data Center Design for the AI Era (Sunday, March 17, 2024)
• Weebit Nano to demo its ReRAM technology on GlobalFoundries' 22FDX® platform (Sunday, March 17, 2024)
• A System On Module (SoM) developed by Electra IC: BitFlex-SPB-A7 FPGA SoM (Sunday, March 17, 2024)
• PrimisAI Unveils Premium Version of RapidGPT, Redefining Hardware Engineering (Wednesday, March 13, 2024)
• HBM3 Initially Exclusively Supplied by SK Hynix, Samsung Rallies Fast After AMD Validation, Says TrendForce (Tuesday, March 12, 2024)
• Arasan proudly releases its Radiation Hardened NAND Flash IP (Tuesday, March 12, 2024)
• Pasqal aims for 10,000 qbit quantum computer in 2026 (Monday, March 11, 2024)
• Cold Spin-Electronics for Quantum Technologies (Monday, March 11, 2024)
• Agile Analog delivers first full always-on IP subsystem (Monday, March 11, 2024)
• Omni Design Technologies Offers Swift™ Data Converters for Advanced Software Defined Radio (SDR) Solutions (Sunday, March 10, 2024)
• OPENEDGES and SEMIFIVE Partnership Reinforce the SoC Platform (Sunday, March 10, 2024)
• CAST Adds I3C Secondary Controller Core to MIPI IP Product Line (Thursday, March 7, 2024)
• nepes corporation expands IC packaging capabilities for the 3D-IC era with advanced design flows from Siemens (Wednesday, March 6, 2024)
• Marvell Announces Industry's First 2nm Platform for Accelerated Infrastructure Silicon (Wednesday, March 6, 2024)
• SignatureIP announces PCIe Gen 6 Controller IP (Wednesday, March 6, 2024)
• JEDEC Publishes GDDR7 Graphics Memory Standard (Tuesday, March 5, 2024)
• The promise of OTS-only memories for next-gen compute (Monday, March 4, 2024)
• Accellera Approves Verilog-AMS 2023 Standard for Release (Sunday, March 3, 2024)
• Agnisys to Showcase Expertise at DVCon US with Exclusive Short Workshop and Tutorial Sessions (Sunday, March 3, 2024)
• Unleash Next-Gen Speeds with Silicon-Proven USB 3.0 PHY IP Cores with Type-C Support in Multiple Process Nodes (Sunday, March 3, 2024)
• Interview: Mahesh Tirupattur, executive VP of Analog Bits - "Be Passionate, Fail Fast and Recover Quick" (Sunday, March 3, 2024)