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• Omni Design Technologies Announces Expanded Silicon IP Solutions on Multiple TSMC Processes (Tuesday, November 28, 2023)
• M31 Completes Validation of 7nm ONFI 5.1 I/O IP - Targeting for the Global AI Big Data Storage Market (Tuesday, November 28, 2023)
• Manufacturers Anticipate Completion of NVIDIA's HBM3e Verification by 1Q24; HBM4 Expected to Launch in 2026, Says TrendForce (Tuesday, November 28, 2023)
• Quantum Effect Technology Breakthrough in Analog Circuit Design (Tuesday, November 28, 2023)
• Siemens revolutionizes engineering simulation with HEEDS AI Simulation Predictor and Simcenter Reduced Order Modeling (Monday, November 27, 2023)
• Bridging the Talent Gap in Flanders' Semiconductor Industry (Monday, November 27, 2023)
• Production Proven USB 3.2 Gen1/Gen2 IP Cores to ensure a seamless throughput for Next-Gen SoCs available for Immediate licensing (Monday, November 27, 2023)
• Tenstorrent Gains Momentum in Asia With Rapidus Partnership (Sunday, November 26, 2023)
• BrainChip Announces Dr. Tony Lewis as the New Chief Technology Officer (Wednesday, November 22, 2023)
• LeWiz Open Source LVDS Transceiver Design (Wednesday, November 22, 2023)
• Alchip Unveils Industry's First Automotive ASIC Design Platform (Tuesday, November 21, 2023)
• Weebit Nano's ReRAM IP achieves high temperature qualification in SkyWater Technology's S130 process (Sunday, November 19, 2023)
• Faraday Unveils Enhanced Gigabit Ethernet PHY on UMCÂ’s 28HPC+ Process (Wednesday, November 15, 2023)
• Thalia's AMALIA (23.4a) qualified on Siemens AFS for increased analog design migration flexibility (Wednesday, November 15, 2023)
• Movellus Introduces Aeonic Insight™ Product Line for On-die Telemetry (Monday, November 13, 2023)
• CXL Consortium Announces Compute Express Link 3.1 Specification Release (Monday, November 13, 2023)
• Rambus Demonstrates CXL Platform Development Kit at SC23 (Monday, November 13, 2023)
• Cadence and Autodesk Collaborate on Smart Product Design (Sunday, November 12, 2023)
• Accellera Announces IEEE 1666™-2023 Standard Available Through IEEE GET Program (Wednesday, November 8, 2023)
• Infineon Extends Microcontroller Portfolio with New PSoC Edge Family of Products (Monday, November 6, 2023)
• OPENEDGES Proud to Announce the World's Only 7nm LPDDR5X PHY IP Operating at 8533 Mbps (Sunday, November 5, 2023)
• SkyWater Announces Availability of Cadence Open-Source PDK and Reference Design for SkyWater's 130 nm Process (Sunday, November 5, 2023)
• proteanTecs Enhances Astera Labs' Connectivity Solutions with Performance and Reliability Monitoring (Wednesday, November 1, 2023)
• sureCore and Intrinsic announce collaboration to accelerate time to market for innovative ReRAM technology (Tuesday, October 31, 2023)
• Realtek Deploys Cadence Tempus Timing Solution to Deliver Working Silicon on N12 Design (Monday, October 30, 2023)
• Synopsys Delivers Seamless Interoperability for Semiconductor Design Ecosystem with New Synopsys Cloud OpenLink Program (Monday, October 30, 2023)
• Weebit Nano's ReRAM IP Awarded "Embedded Solution Product of the Year" in the Electronic Industry Awards (Wednesday, October 25, 2023)
• PCI-SIG® Announces Authorized Test Labs Now Available for PCI Express® Technology (Monday, October 23, 2023)
• PCI-SIG® Announces Authorized Test Labs Now Available for PCI Express® Technology (Monday, October 23, 2023)
• Orthogone Technologies Unveils FPGA-Based Lightning-Fast PCIe DMA Controller Solution (Thursday, October 19, 2023)
• SEMIFIVE Signs MOU with TeraPixel Technologies to Collaborate on Semiconductor Design (Wednesday, October 18, 2023)
• Weebit Nano licenses ReRAM to DB HiTek, a global top-10 foundry (Wednesday, October 18, 2023)
• ARM edges closer to full 2nm chip designs with Total Design (Tuesday, October 17, 2023)
• Cadence Joins Arm Total Design to Accelerate Development of Arm-Based Custom SoCs (Tuesday, October 17, 2023)
• Harnessing the power of the ecosystem in the era of custom silicon on Arm (Tuesday, October 17, 2023)
• Arm and Synopsys Strengthen Partnership to Accelerate Custom Silicon on Advanced Nodes (Tuesday, October 17, 2023)
• Alphawave Semi Elevates Chiplet-Powered Silicon Platforms for AI Compute through Arm Total Design (Tuesday, October 17, 2023)
• OPENEDGES Extends Partnership with InnoGrit Corp for 6nm LPDDR5/4X/4 Memory Controller IP (Sunday, October 15, 2023)
• GOWIN Semiconductor Expands its GW1NZ Series of Low-Cost, Small-Size, and Low-Power Devices (Sunday, October 15, 2023)
• Credo Joins with Industry Players to Announce Effort to Standardize CXL Active Electrical Cables & Optics at OCP Global Summit 2023 (Wednesday, October 11, 2023)
• JEDEC and Open Compute Project Foundation Pave the Way for a New Era of Chiplet Innovation (Tuesday, October 10, 2023)
• Siemens launches Tessent tool for Verilog and RTL design for test (Monday, October 9, 2023)
• Accellera Releases Portable Test and Stimulus Standard 2.1 (Monday, October 9, 2023)
• TSMC looks to standardise chiplet protocols in "world changing" move (Sunday, October 8, 2023)
• ADTechnology and Zaram Technology to develop the next-generation of telecommunications semiconductor chips (Thursday, October 5, 2023)
• MachineWare announces new ARM processor simulation and SystemC profiling products, adds Windows support (Wednesday, October 4, 2023)
• Tenstorrent Selects Samsung Foundry to Manufacture Next-Generation AI Chiplet (Wednesday, October 4, 2023)
• ELES and proteanTecs Partner to Enhance Reliability Testing with Deep Data Analytics (Wednesday, October 4, 2023)
• Marquee Semiconductor Joins Singapore Semiconductor Industry Association to Catalyze Development of Singaporean Hub (Wednesday, October 4, 2023)
• TSMC's 3Dblox 2.0 and 3DFabric Alliance Achievements Set the Stage for the Future of 3D IC (Tuesday, October 3, 2023)