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• ADTechnology Joins Synopsys IP OEM Partner Program (Sunday, July 2, 2023)
• Synopsys and Golden Electronics Collaborate to Expand Chip Design Talent in Jordan (Sunday, July 2, 2023)
• Single Carrier Modem Available For Immediate Licensing From Global IP Core (Sunday, July 2, 2023)
• CAST Introduces New MACsec Protocol Engine IP Cores (Thursday, June 29, 2023)
• OKI IDS adopts Siemens Catapult High-Level Synthesis platform for design and verification services (Wednesday, June 28, 2023)
• Weebit Nano's ReRAM IP now fully qualified in SkyWater Technology's S130 process (Wednesday, June 28, 2023)
• Intel and Movellus Develop Different Fixes For IC Voltage Droop (Wednesday, June 28, 2023)
• Ansys and Synopsys Accelerate RFIC Semiconductor Design with New Reference Flow for Samsung Technology (Wednesday, June 28, 2023)
• Cadence Delivers Certified, Innovative Backside Implementation Flow to Support Samsung Foundry SF2 Technology (Tuesday, June 27, 2023)
• Cadence Digital and Custom/Analog Design Flows Certified for Samsung Foundry's SF2 and SF3 Process Technologies (Tuesday, June 27, 2023)
• DCAN FD Full - a final step to CAN XL? (Tuesday, June 27, 2023)
• With NextGen, CEA is inventing the future generations of electronic chips to maintain France's competitiveness (Monday, June 26, 2023)
• Cadence AI-Based Virtuoso Studio Certified for Samsung Foundry PDKs for Mature and Advanced Nodes (Monday, June 26, 2023)
• Comcores Unveils JESD204 IP Core Integration Guide to Streamline Customer PHY Integration Challenges (Monday, June 26, 2023)
• Arasan furthers the compliance of their I3C IP with its participation in the I3C Interop at MIPI Member Meeting (Monday, June 26, 2023)
• CXL: The key to memory capacity in next-gen data centers (Sunday, June 25, 2023)
• 12Bit ADC and DAC IP Cores with High-Speed, High-Performance for Wireless applications that requires RF are available for immediate licensing (Sunday, June 25, 2023)
• DB GlobalChip Deploys Cadence's Spectre FX and AMS Designer, Accelerating IP Verification by 2X (Sunday, June 25, 2023)
• Airbus and STMicroelectronics to develop silicon carbide power electronics for aircraft (Wednesday, June 21, 2023)
• OPENEDGES Achieves Tapeout of LPDDR5x/5/4x/4 PHY IP on 5nm SF5A Process Technology (Tuesday, June 20, 2023)
• Can Any Novel Architecture Topple the Mighty GPU? (Monday, June 19, 2023)
• Extending Moore's Law: CEA-Leti & Intel to Develop Atomically Thin 2D TMDs on 300mm Wafers Using Layer Transfer Technology for Future Transistor Scaling (Sunday, June 18, 2023)
• DFSPI IP Core from DCD supports all serial memories available on the market. (Thursday, June 15, 2023)
• M31 Has Expanded MIPI IP Portfolio, Successfully Validated 7nm MIPI C/D PHY Combo IP (Thursday, June 15, 2023)
• SK Powertech Adopts Silvaco's Victory TCAD Solution for the Development of Next Generation SiC Power Devices (Wednesday, June 14, 2023)
• Cadence Announces $200 Million Accelerated Share Repurchase Agreement (Wednesday, June 14, 2023)
• Nanusens secures first IP license for its revolutionary MEMS-in-ASICs™ sensor technology (Wednesday, June 14, 2023)
• Axiomose testimonial from AMD (Wednesday, June 14, 2023)
• Meeting the Major Challenges of Modern Memory Design (Wednesday, June 14, 2023)
• Leveraging IBIS-AMI Models to Optimize PCIe 6.0 Designs (Wednesday, June 14, 2023)
• Cadence and Samsung Foundry Enter Multi-Year Agreement to Expand Design IP Portfolio (Tuesday, June 13, 2023)
• PCI-SIG® Announces New Research Projecting PCI Express® Technology TAM Expected to Reach $10 Billion by 2027 (Tuesday, June 13, 2023)
• TSMC's biggest chiplet backend fab opens for business (Monday, June 12, 2023)
• Chiplets advancing one design breakthrough at a time (Monday, June 12, 2023)
• Movellus Announces Industry-First Integrated Droop Response System for SoCs (Monday, June 12, 2023)
• Apple completes its ARM lineup with 5nm, 134billion transistor M2 Ultra (Sunday, June 11, 2023)
• BrainChip Examines New Approach to Optimizing Time-series Data (Sunday, June 11, 2023)
• Imec's process technology roadmap to 2036 (Wednesday, June 7, 2023)
• Cadence expands Arm agreement for EDA tool verification (Tuesday, June 6, 2023)
• Marquee Semiconductor Acquires Semikunn Technology Services, Expanding Design Services Portfolio (Monday, June 5, 2023)
• Dolphin Design picks Imperas for processor functional verification (Sunday, June 4, 2023)
• Dolphin Design Selects Imperas for Processor Functional Design Verification (Sunday, June 4, 2023)
• Arm tapes out Cortex X4 on TSMC N3E (Monday, May 29, 2023)
• Cadence Collaborates with Arm to Accelerate Mobile Device Silicon Success with New Arm Total Compute Solutions (Monday, May 29, 2023)
• SK hynix Enters Industry's First Compatibility Validation Process for 1bnm DDR5 Server DRAM (Sunday, May 28, 2023)
• Synopsys and Arm Strengthen Collaboration for Faster Bring-Up of Next-Generation Mobile SoC Designs on the Most Advanced Nodes (Sunday, May 28, 2023)
• JESD204C PHY & Controller IP Cores with proven automotive compatibility are instantly licensable for extremely reliable performance for your SOC's (Sunday, May 28, 2023)
• Rambus's expectations on faster GDDR6 memory (Thursday, May 25, 2023)
• Partnership enhances deep data analytics in SoCs (Thursday, May 25, 2023)
• Nanusens announces that it can now create ASICs with embedded sensors (Wednesday, May 24, 2023)