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• sureCore now licensing its CryoMem range of IP for Quantum Computing (Monday, November 25, 2024)
• Availability of New 16-bit 5MSps SAR ADC in 40nm Node Sets New Standards for High-Performance Data Conversion (Monday, November 25, 2024)
• Siliconally Releases SinglePHY 100BASE-T1 22FDX, an Automotive Ethernet PHY IP (Sunday, November 24, 2024)
• Optical Transmission Modulation Methods Advance (Wednesday, November 20, 2024)
• SLS Launches Industry-First USB 20Gbps Device IP Core (Sunday, November 17, 2024)
• Siemens launches fully electronic e-Starter with semiconductor technology (Thursday, November 7, 2024)
• Last-Time Buy Notifications For Your ASICs? How To Make the Most of It (Thursday, November 7, 2024)
• Sondrel announces that it is opening up its library of IP for licensing (Wednesday, November 6, 2024)
• Logic Fruit Technologies Launches JESD204D Transmitter and Receiver IP - Advancing High-Bandwidth Data Solutions (Wednesday, November 6, 2024)
• Orca Semi Unveils IO-Link Comms Transceiver for the Smart Factory (Tuesday, November 5, 2024)
• Comcores Announces Strategic Sales Partnership with Micon Global (Tuesday, November 5, 2024)
• Logic Design Solutions launches Gen4 NVMe host IP (Sunday, November 3, 2024)
• JEDEC Publishes LPDDR5 CAMM2 Connector Performance Standard (Wednesday, October 30, 2024)
• Qualitas Semiconductor Expands Cutting-Edge IP Portfolio with the Successful Development of the MIPI DSI-2 TX Controller Solution (Sunday, October 27, 2024)
• Logic Design Solutions launches an EXFAT IP Soft Core for NVMe Host (Tuesday, October 22, 2024)
• Logic Design Solutions launches an EXFAT IP Soft Core for NVMe Host Targeting embedded recorder systems (Monday, October 21, 2024)
• CEA-Leti Launches OpenTRNG, an Open-Source Project For True Random Number Generators Using Ring-Oscillator-Based Architectures (Monday, October 14, 2024)
• Xylon's Updated logiHSSL IP Core Seamlessly Connects Infineon AURIX Microcontrollers with AMD Adaptive SoCs and FPGAs (Monday, October 7, 2024)
• NVMe Updates Expand Discoverability, Security (Monday, October 7, 2024)
• EXTOLL collaborates with Frontgrade Technologies for High-Speed SerDes IP (Tuesday, October 1, 2024)
• Silicon Creations Awarded TSMC's 2024 Open Innovation Platform Partner of the Year for Mixed Signal IP (Wednesday, September 25, 2024)
• MIPI Alliance Releases A-PHY v2.0, Doubling Maximum Data Rate of Automotive SerDes Interface To Enable Emerging Vehicle Architectures (Wednesday, September 25, 2024)
• M31 Launches ONFi5.1 I/O IP on TSMC 5nm Process (Wednesday, September 25, 2024)
• EXTOLL collaborates with BAE Systems as a Key Partner for High-Speed SerDes IP (Wednesday, September 25, 2024)
• eMemory Won TSMC OIP Partner of the Year Award for the Outstanding Development of its NVM IP on Advanced Nodes (Wednesday, September 25, 2024)
• Certus Semiconductor releases I/O library in TowerJazz's 65nm process (Tuesday, September 24, 2024)
• GUC Announces Adoption of HBM3E IP by CSP Data Center (Monday, September 23, 2024)
• Alphawave Semi and InnoLight Extend PCIe over Optics Collaboration with Demonstration of 128Gbps Gen 7.0 over Low Latency Linear Pluggable Optics at ECOC 2024 (Monday, September 23, 2024)
• XtremeSilica Successfully Ships First SDRAM Controller for Tapeout GF40nm (Sunday, September 22, 2024)
• Omni Design Technologies extends partnership with EnSilica and expands Swift™ Data Converter IP portfolio (Sunday, September 22, 2024)
• JEDEC® Adds to Suite of Standards Supporting Compute Express Link® (CXL®) Memory Technology with Publication of Two New Documents (Sunday, September 22, 2024)
• Analog Bits to Demonstrate Power Management and Embedded Clocking and High Accuracy Sensor IP at the TSMC 2024 Open Innovation Platform Ecosystem Forum (Sunday, September 22, 2024)
• Cadence Tensilica HiFi 5 DSPs Used in NXP's Next-Gen Audio DSP Family (Tuesday, September 17, 2024)
• CAST Ships I2C/SPI Controller IP Core for Easier Serial Communication (Wednesday, September 4, 2024)
• Advanced USB 3.0 IP in 22nm boasting a very low power ULP and ULL Technology Licensed to Over 10 Global Customers (Sunday, September 1, 2024)
• Arasan Announces immediate availability of its I3C Host / Device Dual Role Controller IP (Thursday, August 29, 2024)
• JEDEC Releases New Standard for LPDDR5/5X Serial Presence Detect (SPD) Contents (Thursday, August 22, 2024)
• Axiomise Showcases Value of Formal Verification at DVCon Japan and DVCon India (Tuesday, August 20, 2024)
• ADC IP - 14-Bit, 4.32 GSps Silicon-Proven: Now Available for Whitebox Licensing with No Royalty (Tuesday, August 20, 2024)
• Everspin Announces a $9.25M Contract to Provide MRAM Technology for Strategic Radiation Hardened eMRAM Macro (Monday, August 19, 2024)
• The Uberization of Engineering (Thursday, August 8, 2024)
• Imec demonstrates logic and DRAM structures using High NA EUV Lithography (Wednesday, August 7, 2024)
• NVM Express Releases NVM Express Specifications to Unify AI, Cloud, Client, and Enterprise Storage (Wednesday, August 7, 2024)
• Consult Red Announces Strategic Partnership with CAST, Inc. (Tuesday, August 6, 2024)
• NVM Express Releases NVM Express Specifications to Unify AI, Cloud, Client, and Enterprise Storage (Tuesday, August 6, 2024)
• Samsung Electronics Begins Mass Production of Industry's Thinnest LPDDR5X DRAM Packages for On-Device AI (Tuesday, August 6, 2024)
• ZeroPoint Technologies introduces LZ4 Compression and Decompression Hardware IP (Monday, August 5, 2024)
• Imec: Getting High-Precision Sensors to Market (Monday, August 5, 2024)
• T2M-IP Unveils MIPI D-PHY v2.5 Tx and DSI Tx Controller v1.2: Silicon-Proven, Low-Power, Cost-Effective IP Core Solutions for Advanced SoCs (Monday, August 5, 2024)
• DDR5 Gains Enhanced Security, Reliability, and Power Management Features (Friday, August 2, 2024)