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• Arasan Announces immediate availability of its I3C Host / Device Dual Role Controller IP (Thursday, August 29, 2024)
• JEDEC Releases New Standard for LPDDR5/5X Serial Presence Detect (SPD) Contents (Thursday, August 22, 2024)
• Axiomise Showcases Value of Formal Verification at DVCon Japan and DVCon India (Tuesday, August 20, 2024)
• ADC IP - 14-Bit, 4.32 GSps Silicon-Proven: Now Available for Whitebox Licensing with No Royalty (Tuesday, August 20, 2024)
• Everspin Announces a $9.25M Contract to Provide MRAM Technology for Strategic Radiation Hardened eMRAM Macro (Monday, August 19, 2024)
• The Uberization of Engineering (Thursday, August 8, 2024)
• Imec demonstrates logic and DRAM structures using High NA EUV Lithography (Wednesday, August 7, 2024)
• NVM Express Releases NVM Express Specifications to Unify AI, Cloud, Client, and Enterprise Storage (Wednesday, August 7, 2024)
• Consult Red Announces Strategic Partnership with CAST, Inc. (Tuesday, August 6, 2024)
• NVM Express Releases NVM Express Specifications to Unify AI, Cloud, Client, and Enterprise Storage (Tuesday, August 6, 2024)
• Samsung Electronics Begins Mass Production of Industry's Thinnest LPDDR5X DRAM Packages for On-Device AI (Tuesday, August 6, 2024)
• ZeroPoint Technologies introduces LZ4 Compression and Decompression Hardware IP (Monday, August 5, 2024)
• Imec: Getting High-Precision Sensors to Market (Monday, August 5, 2024)
• T2M-IP Unveils MIPI D-PHY v2.5 Tx and DSI Tx Controller v1.2: Silicon-Proven, Low-Power, Cost-Effective IP Core Solutions for Advanced SoCs (Monday, August 5, 2024)
• DDR5 Gains Enhanced Security, Reliability, and Power Management Features (Friday, August 2, 2024)
• M31 cooperates with Tower Semiconductor to develop advanced SRAM and ROM solutions for its 65nm Power Management Platform (Thursday, August 1, 2024)
• Weebit Nano and DB HiTek tape-out ReRAM module in DB HiTek's 130nm BCD process (Wednesday, July 31, 2024)
• Weebit Nano moves closer to availability at DB HiTek; tapes out first chip (Wednesday, July 31, 2024)
• Rambus Expands Industry-Leading Memory Interface Chip Offering to High-Performance PCs with DDR5 Client Clock Driver (Tuesday, July 30, 2024)
• Weebit Nano to present test results of ReRAM performance on GlobalFoundries 22FDX® wafers at FMS 2024 (Monday, July 29, 2024)
• Raaam signs lead licensee for SRAM replacement technology (Monday, July 29, 2024)
• Silicon-Proven 14-Bit 4.32 GSps Wide Band ADC IP Core with Time-Interleaved Pipeline Architecture Now Available for Whitebox Licensing with No Royalty Fees (Monday, July 29, 2024)
• DDR5 Gets More Security, Power Management Features (Friday, July 26, 2024)
• Agile Analog delivers customizable IP on GlobalFoundries' FinFet and FDX processes (Thursday, July 25, 2024)
• MIPI C-D Combo PHY and DSI Controller IP Cores, Silicon Proven, Immediate licensing at a Competitive Price for Your Next Project (Monday, July 22, 2024)
• JEDEC Unveils Plans for DDR5 MRDIMM and LPDDR6 CAMM Standards to Propel High-Performance Computing and AI (Monday, July 22, 2024)
• Samsung Completes Validation of Industry's Fastest LPDDR5X for Use with MediaTek's Flagship Mobile Platform (Tuesday, July 16, 2024)
• Qualitas Semiconductor Announces First Domestic Development of PCIe 6.0 PHY IP (Tuesday, July 16, 2024)
• AI-driven SRAM demand needs integrated repair and security (Monday, July 15, 2024)
• Samsung to mass-produce HBM4 on 4 nm foundry process (Monday, July 15, 2024)
• OPENEDGES Successfully Validated Its 7nm HBM3 Testchip (Sunday, July 14, 2024)
• L&T Semiconductor Technologies Partners with CP Plus to develop Semiconductor Chips for CCTV Camera Solutions (Sunday, July 14, 2024)
• Advanced MIPI DSI Tx & Rx Controller IP Cores: Low-Power, Cost-Effective Solutions for Modern Display SoCs (Sunday, July 14, 2024)
• HBM4 memory standard is almost ready, according to JEDEC (Wednesday, July 10, 2024)
• New MIPI SDCA Specification Simplifies Audio Software Architecture and Driver Requirements, Optimizing Integration of Audio Devices into Open Host Platforms (Tuesday, July 9, 2024)
• JEDEC Approaches Finalization of HBM4 Standard, Eyes Future Innovations (Tuesday, July 9, 2024)
• MIPI C-PHY / D-PHY Combo IP (4.5Gbps) and CSI Tx Controller IP Cores, to meet the highest standards of performance and reliability for a wide range of applications (Monday, July 8, 2024)
• JEDEC® Announces Publication of Compute Express Link® (CXL®) Support Standards (Sunday, July 7, 2024)
• Mixel Announces Immediate Availability of MIPI C-PHY/D-PHY Combo IP on STMicroelectronics 40LP Process Technology (Monday, July 1, 2024)
• Rambus offers DDR5 server PMICs to address AI workloads (Wednesday, June 26, 2024)
• Crafting a Silicon Lifecycle Management Strategy for HPC and Data Centers (Wednesday, June 26, 2024)
• Enosemi announces availability of C-band-compatible electronic-photonic design IP (Monday, June 24, 2024)
• T2M-IP Announces Silicon-Proven MIPI D-PHY v2.5 Tx and DSI-2 Tx Controller Low-Power, Cost-Effective IP Cores Solutions for Advanced SoCs (Sunday, June 23, 2024)
• Tenstorrent Licenses Baya Systems' Fabric into next-generation AI and Compute Chiplet Solutions (Thursday, June 20, 2024)
• M31 Announces the Launch of Advanced LPDDR Memory IP to Support HPC Applications (Tuesday, June 18, 2024)
• Movellus Introduces Aeonic Power™ Product Family for On-Die Voltage Regulation (Tuesday, June 18, 2024)
• OPENEDGES to Premiere PHY Vision 2.0 at Design Automation Conference 2024 (Tuesday, June 18, 2024)
• SureCore Balances Power and Cooling Costs With Cryogenic Memory (Tuesday, June 11, 2024)
• Rambus Unveils PCIe 7.0 IP Portfolio for High-Performance Data Center and AI SoCs (Tuesday, June 11, 2024)
• Marvell Announces Industry's First 5nm Transmit-Only 800G PAM4 Optical DSP for AI and Cloud Interconnects (Sunday, March 24, 2024)