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Sunday, August 14, 2022

• 2022 RISC-V Taipei Day to be held in September to explore RISC-V driven developments in EV, smart vehicles
• New US EDA Software Ban May Affect China's Advanced IC Design, Says TrendForce
• Edgewater Wireless Expands Intellectual Property Monetization Initiatives
• Intel Elects Lip-Bu Tan to Its Board of Directors

Thursday, August 11, 2022

• Vidatronic Expands Portfolio of Power Management, Analog, and Security IP with Additional 180 nm to 22 nm Technologies for IoT Applications Available for Licensing
• Truechip Announces First Customer Shipment of CXL 3 Verification IP and CXL Switch Model

Wednesday, August 10, 2022

• Neuromorphic Chip Gets $1 Million in Pre-Orders
• Tudor Brown resigns from SMIC
• SMIC Reports 2022 Second Quarter Results
• Opinion: CHIPS Act Escalates Long-Standing U.S.-China Tech Rivalry
• Arasan refreshes its Total USB IP Solution with its next generation of USB 2.0 PHY IP

Wednesday, August 10, 2022

• Cadence Library Characterization Solution Accelerates Delivery and Enhances Quality of Arm Memory Products

Tuesday, August 9, 2022

• Arteris Announces Financial Results for the Second Quarter 2022 and Estimated Third Quarter and Full Year 2022 Guidance
• Siemens selected by Microsoft for Rapid Assured Microelectronics Prototypes (RAMP) Program
• CEVA, Inc. Announces Second Quarter 2022 Financial Results

Monday, August 8, 2022

• Renesas looks to simplify industrial ethernet implementations
• GlobalFoundries CEO: Earnings benefited from balanced supply chain, diverse end markets
• CEVA Celebrates 15 Billionth CEVA-powered Chip Shipped
• Logic Fruit appoints Vijay Pal Sharma as VP - Engineering

Sunday, August 7, 2022

• SiFive Is Leading The Way For Innovation On RISC-V
• GlobalFoundries and Qualcomm Announce Extension of Long-term Agreement to Secure U.S. Supply through 2028
• Space Codesign Systems joins Siemens Digital Industries Software Solution Partner Program as a Software and Technology Partner
• Arm achieves record revenue and shipments in Q1 FY 2022
• Enhance your SD Card experience by integrating SD 4.1 UHS-II PHY IP Core to achieve Ultra High Speeds

Thursday, August 4, 2022

• Intel tGPU Setback Expected to Slow TSMC's 3 nm Ramp
• Nordic Semi sets up RISC-V design team
• Brite Semiconductor provides xSPI/Hyperbusâ„¢/Xcellaâ„¢ controller and PHY total solution
• Brite Semiconductor provides xSPI/Hyperbus™/Xcella™ controller and PHY total solution
• GUC Monthly Sales Report - July 2022
• Cadence Accelerates Hyperscale SoC Design with Industry's First Verification IP and System VIP for CXL 3.0

Wednesday, August 3, 2022

• STMicroelectronics Supports the World Transitions to Digitalization and Decarbonization with its Pioneered FD-SOI Technology
• Neuromorphic Device with Low Power Consumption
• Edge Impulse Releases Deployment Support for BrainChip Akida Neuromorphic IP
• Rambus Reports Second Quarter 2022 Financial Results
• Architect of CHIPS Act Speaks on Its Impact
• Efinix® Extends Breakthrough Family of Titanium Products with Launch of the Titanium Ti180 FPGA
• June Swoon - IC Sales Turn Negative as Economy Weighs on Market
• UMC Reports Sales for July 2022
• Intel Orders Delayed, TSMC Slows Three-Nanometer Expansion, Says TrendForce
• IPrium releases CCSDS TC Telecommand LDPC Encoder and Decoder
• Access Advance VVC Patent Pool Momentum Grows
• Cadence Library Characterization Solution Accelerates Delivery and Enhances Quality of Arm Memory Products

Tuesday, August 2, 2022

• UCIeâ„¢ (Universal Chiplet Interconnect Expressâ„¢) Consortium Announces Incorporation and New Board Members; Open for Membership
• UCIe™ (Universal Chiplet Interconnect Express™) Consortium Announces Incorporation and New Board Members; Open for Membership
• CXL Consortium Releases Compute Express Link 3.0 Specification to Expand Fabric Capabilities and Management
• Global Semiconductor Sales Increase 13.3% in Q2 2022 Compared to Q2 2021
• Imperas leads the RISC-V verification ecosystem as the first to release an open-source SystemVerilog RISC-V processor functional coverage library
• Alma Technologies Announces the Immediate Availability of an Ultra-High Throughput Image Scaler IP Core
• Accellera Announces Proposed Working Group to Explore Clock Domain Crossing Standard