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Wednesday, June 2, 2021

• TSMC's Zhang: Automotive is Going HPC
• Synopsys Expands Multi-Die Solution Leadership with Industry's Lowest Latency Die-to-Die Controller IP
• SmartDV Announces Support for ARINC Standards with Design and Verification IP
• Siemens enhances Nucleus ReadyStart for Arm platforms with enhanced debug, security and stability features
• intoPIX delivers JPEG XS Compressed Solutions for Low Latency Video Streaming with NVIDIA GPUs
• EdgeCortix Collaborates with Cadence to Accelerate AI Chip Design
• Texas Instruments Continues As World's Top Analog IC Supplier
• Brite Semiconductor Releases ONFI 4.2 IO and Physical Layer IP based on SMIC 14nm FinFET Process
• Sondrel launches the fourth IP platform - SFA 350A - that delivers faster time to market for ADAS ASICs
• Sondrel launches the fourth IP platform – SFA 350A – that delivers faster time to market for ADAS ASICs

Tuesday, June 1, 2021

• TSMC to Build Semiconductor R&D Center in Japan
• TSMC Widens Its Gap with Samsung in Foundry Business
• Majority of Top 20 APAC Tech Firms Managed to Post Growth in 2020
• Socionext's Advanced New Sensor Technology Ideal for A Wide Range of Applications
• TSMC Technology Symposium: Siemens verification for TSMC 4nm and 3nm
• Record Q1 foundry revenues
• TSMC's 4nm process coming ahead of schedule
• First step in its Multi-Codec HEVC and VVC Platform Initiative
• TSMC Unveils Innovations at 2021 Online Technology Symposium
• PUFsecurity and Andes Technology Cooperate to Integrate Crypto Coprocessor PUFiot into RISC-V AIoT Security Platform
• NXP Ramps Automotive Processing Innovation with Two Processors on TSMC 16nm FinFET Technology
• Arm empowers MCU software developers to capitalize on IoT potential
• Aldec Launches HES-DVM Proto "Cloud Edition" - Giving Engineers Easier Access to FPGA-based ASIC & SoC Prototyping
• PLDA and AnalogX Announce Market-leading CXL 2.0 Solution featuring Ultra-low Latency and Power

Monday, May 31, 2021

• Intel Unveils New Additions to 11th Gen Processor Portfolio
• European Processor Initiative Announces EPAC1.0 RISC-V Test Chip Taped-out
• Synopsys DesignWare IP Achieves Broad Industry Adoption with Multiple First-Pass Customer Silicon Successes on TSMC's N5 Process
• Siemens announces EDA milestones and tool certifications for TSMC's latest process technologies
• Sequans Licenses CEVA 5G Modem IP for Broadband IoT Platform
• EPI EPAC1.0 RISC-V Test Chip Taped-out
• Analog Bits to Demonstrate 5nm IP Silicon at TSMC 2021 Online Technology Symposium

Sunday, May 30, 2021

• Quarterly Revenue of Top 10 Foundries Breaks Records in 1Q21 Owing to Price Hikes Caused by Tight Foundry Capacities, Says TrendForce
• Dolphin Design joins Arm Approved Design Partner Program
• SEGGER's emRun Runtime Library Licensed by SiFive for Superior Code Size and Performance Improvements
• Arm Upgrades Its Entire PC And Mobile Portfolio
• Join Innosilicon at TSMC 2021 Online Technology Symposium
• Cadence Collaborates with TSMC to Accelerate Mobile, AI and Hyperscale Computing Application Development on N3 and N4 Processes

Thursday, May 27, 2021

• Edge AI Inferencing Opens Up New World of Opportunities
• CEA-Leti Introduces Plastic mmWave System for Applications Requiring Ultra-Low Latency and Ultra-High-Speed Connectivity
• Synopsys ports Moortec PVT sensor to 3nm

Wednesday, May 26, 2021

• Synopsys DesignWare PVT Subsystem Drives Performance, Power and Silicon Lifecycle Management on TSMC's N3 Process Technology
• Mirabilis Design and E-Elements Technology team up to provide concept-to-implementation design flow for AI applications
• Siemens launches PCI Express 6.0 Questa Verification IP solution
• Arm battens down the spending hatches
• USB Promoter Group Announces USB Power Delivery Specification Revision 3.1
• DCD-SEMI accelerates AES security with the latest IP Core
• Precise-ITC launches 10G-1.6T Ethernet/FiberChannel/FlexO IP Core
• Silex Insight launches high performance (2Tbps) SM4-GCM Multi-booster
• AImotive launches aiWare4, featuring advanced wavefront processing, upgraded safety and low-power features

Tuesday, May 25, 2021

• 5G Ethernet Subsystem to reduce development time is now available
• Imperas Simulation Reference Models selected by IAR Systems for Arm 64bit
• Intel hangs on to No.1 rank in Q1
• Autonomous imager for smartphones, home appliances and automobiles
• Cadence Unleashes Clarity 3D Solver on the Cloud for Straightforward, Secure and Scalable Electromagnetic Analysis of Complex Systems on AWS
• TSMC accounts for 70% of global contract MCU production
• proteanTecs' UCT to be Exhibited at the TSMC 2021 Online Technology Symposiums for North America, Europe and Taiwan
• Siemens expands Simcenter with AI-driven generative engineering for systems architectures
• Cadence Collaboration with Arm Enables Customers to Successfully Tape out Next-Generation Arm Mobile Designs
• eYs3D Microelectronics, Co. Raises $7 Million Series A from Leading Industry Strategic Investors for Vision/AI Chips
• Oracle adds Arm Neoverse-based cloud instances with OCI Ampere A1
• Synopsys Digital and Custom Design Platforms Certified for TSMC's Latest 3nm Process Technology
• Lattice sensAI Solution Stack Simplifies Deployment of AI/ML Models on Smart Edge Devices
• Hardent Joins Samsung SAFE IP Partner Program & Launches New Display IP Subsystem Solution in Collaboration with Rambus

Monday, May 24, 2021

• BrainChip highlights its Akida Neural Processor at AI Field Day 2
• 10 Key Drivers to Transform 5G Adoption
• AI Driving Renewed Interest in Processing-in-Memory
• Arm invests in edge vision startup
• Global 200mm Fab Capacity on Pace to Record Growth to Meet Surging Demand and Address Chip Shortage, SEMI Reports
• Top-15 Semi Companies Log Year-Over-Year Growth of 21% in 1Q21
• Synopsys Enables First-Pass Silicon Success for Early Adopters of Next-Generation Armv9 Architecture-based SoCs
• Avery Design Launches PCI Express 6.0 Verification IP to Enable Early Development, Compliance Checking for New Version of Standard
• PLDA Announces XpressRICH PCI Express 6.0 Controller IP for Next Generation SoC Designs
• Arm Total Compute solutions bring performance, security and Armv9 to the broadest range of Client devices

Sunday, May 23, 2021

• GF foundry deal for 6G RF GaN
• Cadence Announces New Low-Power IP for PCI Express 5.0 Specification on TSMC N5 Process
• Cadence Accelerates Cloud Hyperscale Infrastructure with Third-Generation 112G-LR SerDes IP on TSMC's N5 Process
• U.S. Chip Makers Embrace Collaboration
• GUC Announces GLink-3D Die-on-Die Interface IP using TSMC N5 and N6 Process for 3DFabric Advanced Packaging Technology
• Arm partners are shipping more than 900 Arm-based chips per second based on latest results
• Logic Fruit Technologies Launches ARINC 818 RTL IP Core for Avionics applications
• RISC-V Functional Safety Processor IP Core Introduced by CAST and Fraunhofer IPMS
• JVCKENWOOD Deploys Cadence Spectre FX Simulator and Comprehensive Design Flows to Improve Productivity
• Siemens receives three Samsung Foundry SAFE EDA awards
• Cadence Introduces the Spectre FX FastSPICE Simulator Delivering up to 3X Performance Gains with Superior Accuracy

Saturday, May 22, 2021

• Think Silicon and Ambiq enable IoT devices