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Friday, January 17, 2025

• Nvidia teams up with TSMC in silicon photonics development
• Nvidia teams up with TSMC in silicon photonics development

Thursday, January 16, 2025

• Commerce Department Finalizes CHIPS Act Awards, Adds $75M for GlobalFoundries Expansion
• TSMC refuses to make Samsung Exynos: no surprise
• Progressing on Track: PCIe 7.0 Specification, Version 0.7 Now Available for Member Review
• Alchip opens 3DIC ASIC design services
• QuickLogic to Exhibit at Chiplet Summit 2025
• European 1nm, photonics chip pilot lines launch
• GlobalFoundries Announces New York Advanced Packaging and Photonics Center
• TSMC refuses to make Samsung Exynos: no surprise
• Progressing on Track: PCIe 7.0 Specification, Version 0.7 Now Available for Member Review
• Alchip opens 3DIC ASIC design services
• QuickLogic to Exhibit at Chiplet Summit 2025
• European 1nm, photonics chip pilot lines launch
• GlobalFoundries Announces New York Advanced Packaging and Photonics Center

Wednesday, January 15, 2025

• Ultra Accelerator Link Consortium (UALink) Welcomes Alibaba, Apple and Synopsys to Board of Directors
• Breaking Ground in Post-Quantum Cryptography Real World Implementation Security Research
• InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
• CAST to Enter the Post-Quantum Cryptography Era with New KiviPQC-KEM IP Core
• RIKEN adopts Siemens' emulation and High-Level Synthesis platforms for next-generation AI device research
• Ultra Accelerator Link Consortium (UALink) Welcomes Alibaba, Apple and Synopsys to Board of Directors
• Breaking Ground in Post-Quantum Cryptography Real World Implementation Security Research
• InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
• CAST to Enter the Post-Quantum Cryptography Era with New KiviPQC-KEM IP Core
• RIKEN adopts Siemens' emulation and High-Level Synthesis platforms for next-generation AI device research
• Breaking Ground in Post-Quantum Cryptography Real World Implementation Security Research
• InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
• CAST to Enter the Post-Quantum Cryptography Era with New KiviPQC-KEM IP Core
• RIKEN adopts Siemens' emulation and High-Level Synthesis platforms for next-generation AI device research

Tuesday, January 14, 2025

• Fraunhofer IZM is powering the evolution of chiplet technologies as part of the APECS pilot line
• The inevitable opportunity for photonics In quantum computing
• European regulator approves Synopsys' $35bn Ansys acquisition after companies agree to divest software assets
• Fraunhofer IZM is powering the evolution of chiplet technologies as part of the APECS pilot line
• The inevitable opportunity for photonics In quantum computing
• European regulator approves Synopsys' $35bn Ansys acquisition after companies agree to divest software assets
• European regulator approves Synopsys' $35bn Ansys acquisition after companies agree to divest software assets

Tuesday, January 14, 2025

• Vertical Compute, a new imec spin-off, raises €20 million to Revolutionize the Future of AI Computing

Monday, January 13, 2025

• QuickLogic Signs Agreement with Magenta to Expand Distribution Network to Turkiye and UAE
• Samsung reportedly to cut NAND production
• CES 2025: Automotive suppliers focus on software and safety
• Ultra Accelerator Link™ Consortium (UALink™) Welcomes Alibaba, Apple and Synopsys to Board of Directors
• MZ Technologies Unveils Next Generation Chiplet/Package Design Tool
• € 20m for imec MRAM in-memory compute chiplet spinout
• Chip Interfaces Successfully Completes Interlaken IP Interoperability Test with Cadence 112G Long-Reach PHY
• YorChip and ChipCraft announce low-cost, high-speed 200Ms/s ADC Chiplet
• Creonic Introduces Doppler Channel IP Core
• RISC-V in AI and HPC Part 2: Per Aspera Ad Astra?
• QuickLogic Signs Agreement with Magenta to Expand Distribution Network to Turkiye and UAE
• Samsung reportedly to cut NAND production
• CES 2025: Automotive suppliers focus on software and safety
• Ultra Accelerator Link™ Consortium (UALink™) Welcomes Alibaba, Apple and Synopsys to Board of Directors
• MZ Technologies Unveils Next Generation Chiplet/Package Design Tool
• € 20m for imec MRAM in-memory compute chiplet spinout
• Chip Interfaces Successfully Completes Interlaken IP Interoperability Test with Cadence 112G Long-Reach PHY
• YorChip and ChipCraft announce low-cost, high-speed 200Ms/s ADC Chiplet
• Creonic Introduces Doppler Channel IP Core
• RISC-V in AI and HPC Part 2: Per Aspera Ad Astra?
• QuickLogic Signs Agreement with Magenta to Expand Distribution Network to Turkiye and UAE
• Samsung reportedly to cut NAND production
• CES 2025: Automotive suppliers focus on software and safety
• Ultra Accelerator Link™ Consortium (UALink™) Welcomes Alibaba, Apple and Synopsys to Board of Directors
• MZ Technologies Unveils Next Generation Chiplet/Package Design Tool
• € 20m for imec MRAM in-memory compute chiplet spinout
• Chip Interfaces Successfully Completes Interlaken IP Interoperability Test with Cadence 112G Long-Reach PHY
• YorChip and ChipCraft announce low-cost, high-speed 200Ms/s ADC Chiplet
• Creonic Introduces Doppler Channel IP Core
• RISC-V in AI and HPC Part 2: Per Aspera Ad Astra?
• Chip Interfaces Successfully Completes Interlaken IP Interoperability Test with Cadence 112G Long-Reach PHY
• YorChip and ChipCraft announce low-cost, high-speed 200Ms/s ADC Chiplet
• Creonic Introduces Doppler Channel IP Core
• RISC-V in AI and HPC Part 2: Per Aspera Ad Astra?

Monday, January 13, 2025

• Europe's technology trends for 2025
• Foundry Giants' Advanced Node Expansion Efforts Beyond 2025: TSMC, Intel, Rapidus and More

Sunday, January 12, 2025

• SIA Statement on Biden Administration Action Imposing New Export Controls on AI Chips
• Imagination pulls out of RISC-V CPUs
• BrainChip Brings Neuromorphic Capabilities to M.2 Form Factor
• NASA Awards Alphacore Four Contracts for Radiation Hardened Microelectronics Innovation
• TSMC December 2024 Revenue Report
• Exostiv Labs Unveils AMD Versal Adaptive SoC Device Support for Exostiv and Exostiv Blade Platforms
• Synopsys Responds to the European Commission Approving its Proposed Acquisition of Ansys in Phase 1
• Alphacore's Digital CMOS Impulse Ground-Penetrating Radar (GPR) Transceiver ASIC

Sunday, January 12, 2025

• By 2032, SerDes Market Set to Cross USD 2,422.8 million

Friday, January 10, 2025

• FPGA company Altera announces independence from Intel

Thursday, January 9, 2025

• EU approves Synopsys' $35 billion Ansys deal under conditions

Thursday, January 9, 2025

• Why Secure by Design Is Essential for Cybersecurity
• Cognizant collaborates with Siemens on solution accelerator for Software-Defined Vehicles

Wednesday, January 8, 2025

• Imagination quits RISC-V CPU business to focus on GPUs and AI
• Multi-Die Health and Reliability: Synopsys and TSMC Showcase UCIe Advances
• First full wafer-scale fabrication of electrically-pumped GaAs-based nano-ridge lasers on 300 mm silicon wafers
• Ansys sells power design tool to Keysight in Synopsys deal
• M31's 12nm GPIO IP Adopted by C*Core Technology, Powering Innovation in Advanced Process Automotive Chips
• Qualitas Semiconductor and Verisilicon signed a licensing agreement for 4nm PCIe 6.0 PHY IP
• TTTech divests strategic stake in landmark transaction to NXP to fuel future growth with technology investments in core business

Wednesday, January 8, 2025

• 2025 Will See Huge Advances in Quantum Computing. So What is a Quantum Chip And How Does it Work?

Tuesday, January 7, 2025

• Chiplet technology and advanced SoCs are shaping the future of software-defined vehicles
• Samsung invests in neural sensor startup Pison
• Cadence: Leading the EDA Industry with AI-Powered Platforms
• Silicon Photonics Pioneer CEA-Leti Will Unveil Major R&D Gains At Photonics West Jan. 25-30
• Ceva Powers Oritek's Next-Gen ADAS chipsets for Smarter, Safer Electric Vehicles
• Ansys and Synopsys Announce Agreement with Keysight Technologies for Sale of Ansys PowerArtist
• Synopsys Responds to the UK Competition and Markets Authority Provisionally Accepting its Proposed Remedies in Phase 1 Regarding its Proposed Acquisition of Ansys
• BrainChip Unveils Edge AI Box Partner Ecosystem for Gestures, Cybersecurity, Image Recognition, and Computer Vision
• VeriSilicon's Display Processing IP DC8200-FS has achieved ISO 26262 ASIL B certification
• Eighteen New Semiconductor Fabs to Start Construction in 2025, SEMI Reports

Tuesday, January 7, 2025

• Secure-IC's worldwide leading safe & secure automotive solutions achieve a new breakthrough: Securyzrâ„¢ S700 neo series reach ASIL-D grade

Tuesday, January 7, 2025

• Siemens launches new program to empower startups with cutting-edge technology

Monday, January 6, 2025

• Nvidia and TSMC team up on a silicon photonics chip prototype
• Ceva Expands Embedded AI NPU Ecosystem with New Partnerships That Accelerate Time-to-Market for Smart Edge Devices
• Ceva Embedded AI NPUs Gain Traction in AIoT and MCU Markets, with Multiple Customer Wins and Enhanced AI Software Studio
• QuickLogic Announces Strategic Process for SensiML
• Secure-IC's worldwide leading safe & secure automotive solutions achieve a new breakthrough: Securyzr™ S700 neo series reach ASIL-D grade
• UMC Reports Sales for December 2024
• GUC Taped Out UCIe 40Gbps IP using Adaptive Voltage Scaling (AVS)
• Qualitas Semiconductor Secures Multiple Project Licensing Agreements with Pansemi Following Successful Initial Collaboration
• UMC Reports Sales for December 2024
• GUC Taped Out UCIe 40Gbps IP using Adaptive Voltage Scaling (AVS)
• Qualitas Semiconductor Secures Multiple Project Licensing Agreements with Pansemi Following Successful Initial Collaboration