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Monday, June 7, 2021

• Nvidia asks Chinese regulators to approve US$40b Arm deal: FT
• RISC-V FPGA SoM module starts production
• TSMC's 3DFabric Technology is the next big wave in Chip Design that Apple will take advantage of in the not-too-distant Future
• Siemens acquires proFPGA product family from PRO DESIGN to expand industry-leading IC verification portfolio
• GUC Tapes Out AI/HPC/Networking Platform on TSMC CoWoS Technology Validating 7.2 Gbps HBM3 Controller and PHY, GLink-2.5D and 112G-LR SerDes IPs
• Synopsys Acquires Code Dx to Extend Application Security Portfolio
• Xylon Releases a Complete Multi-Channel HDR ISP IP Suite
• eMemory and PUFsecurity Join DARPA Toolbox Initiative
• GLOBALFOUNDRIES and GlobalWafers Partnering to Expand Semiconductor Wafer Supply
• Arteris IP FlexNoC Interconnect & Resilience Package Again Licensed by Black Sesame for ISO 26262-Compliant Automotive ADAS Chips
• Mythic Expands Product Lineup with New Scalable, Power-Efficient Analog Matrix Processor for Edge AI Applications

Sunday, June 6, 2021

• Automotive Software & Cybersecurity
• Cryptography Innovations in Hardware Processors
• Siemens EDA Tools Now Qualified on TSMC's N3, N4 Processes
• UMC Reports Sales for May 2021
• NVM Express Announces the Rearchitected NVMe 2.0 Library of Specifications
• Palma Ceia SemiDesign Announces New Wi-Fi HaLow Chips, PCS2100 and PCS2500 - Ideal for Industry 4.0
• GUC Monthly Sales Report - May 2021

Wednesday, June 2, 2021

• TSMC's Zhang: Automotive is Going HPC
• Synopsys Expands Multi-Die Solution Leadership with Industry's Lowest Latency Die-to-Die Controller IP
• SmartDV Announces Support for ARINC Standards with Design and Verification IP
• Siemens enhances Nucleus ReadyStart for Arm platforms with enhanced debug, security and stability features
• intoPIX delivers JPEG XS Compressed Solutions for Low Latency Video Streaming with NVIDIA GPUs
• EdgeCortix Collaborates with Cadence to Accelerate AI Chip Design
• Texas Instruments Continues As World's Top Analog IC Supplier
• Brite Semiconductor Releases ONFI 4.2 IO and Physical Layer IP based on SMIC 14nm FinFET Process
• Sondrel launches the fourth IP platform - SFA 350A - that delivers faster time to market for ADAS ASICs
• Sondrel launches the fourth IP platform – SFA 350A – that delivers faster time to market for ADAS ASICs

Tuesday, June 1, 2021

• TSMC to Build Semiconductor R&D Center in Japan
• TSMC Widens Its Gap with Samsung in Foundry Business
• Majority of Top 20 APAC Tech Firms Managed to Post Growth in 2020
• Socionext's Advanced New Sensor Technology Ideal for A Wide Range of Applications
• TSMC Technology Symposium: Siemens verification for TSMC 4nm and 3nm
• Record Q1 foundry revenues
• TSMC's 4nm process coming ahead of schedule
• First step in its Multi-Codec HEVC and VVC Platform Initiative
• TSMC Unveils Innovations at 2021 Online Technology Symposium
• PUFsecurity and Andes Technology Cooperate to Integrate Crypto Coprocessor PUFiot into RISC-V AIoT Security Platform
• NXP Ramps Automotive Processing Innovation with Two Processors on TSMC 16nm FinFET Technology
• Arm empowers MCU software developers to capitalize on IoT potential
• Aldec Launches HES-DVM Proto "Cloud Edition" - Giving Engineers Easier Access to FPGA-based ASIC & SoC Prototyping
• PLDA and AnalogX Announce Market-leading CXL 2.0 Solution featuring Ultra-low Latency and Power

Monday, May 31, 2021

• Intel Unveils New Additions to 11th Gen Processor Portfolio
• European Processor Initiative Announces EPAC1.0 RISC-V Test Chip Taped-out
• Synopsys DesignWare IP Achieves Broad Industry Adoption with Multiple First-Pass Customer Silicon Successes on TSMC's N5 Process
• Siemens announces EDA milestones and tool certifications for TSMC's latest process technologies
• Sequans Licenses CEVA 5G Modem IP for Broadband IoT Platform
• EPI EPAC1.0 RISC-V Test Chip Taped-out
• Analog Bits to Demonstrate 5nm IP Silicon at TSMC 2021 Online Technology Symposium

Sunday, May 30, 2021

• Quarterly Revenue of Top 10 Foundries Breaks Records in 1Q21 Owing to Price Hikes Caused by Tight Foundry Capacities, Says TrendForce
• Dolphin Design joins Arm Approved Design Partner Program
• SEGGER's emRun Runtime Library Licensed by SiFive for Superior Code Size and Performance Improvements
• Arm Upgrades Its Entire PC And Mobile Portfolio
• Join Innosilicon at TSMC 2021 Online Technology Symposium
• Cadence Collaborates with TSMC to Accelerate Mobile, AI and Hyperscale Computing Application Development on N3 and N4 Processes

Thursday, May 27, 2021

• Edge AI Inferencing Opens Up New World of Opportunities
• CEA-Leti Introduces Plastic mmWave System for Applications Requiring Ultra-Low Latency and Ultra-High-Speed Connectivity
• Synopsys ports Moortec PVT sensor to 3nm

Wednesday, May 26, 2021

• Synopsys DesignWare PVT Subsystem Drives Performance, Power and Silicon Lifecycle Management on TSMC's N3 Process Technology
• Mirabilis Design and E-Elements Technology team up to provide concept-to-implementation design flow for AI applications
• Siemens launches PCI Express 6.0 Questa Verification IP solution
• Arm battens down the spending hatches
• USB Promoter Group Announces USB Power Delivery Specification Revision 3.1
• DCD-SEMI accelerates AES security with the latest IP Core
• Precise-ITC launches 10G-1.6T Ethernet/FiberChannel/FlexO IP Core
• Silex Insight launches high performance (2Tbps) SM4-GCM Multi-booster
• AImotive launches aiWare4, featuring advanced wavefront processing, upgraded safety and low-power features