Search News

Tuesday, April 28, 2020

• Why Software Matters in the Age of AI?
• PathPartner Joins the Bureau of Indian StandardsÂ’ Artificial Intelligence Sectional Committee
• Arm offers silicon startups zero-cost access to the world's most widely used chip designs
• Silicon Catalyst Collaborates with Arm to Accelerate Semiconductor Startups
• Multi-Constellation GNSS IP licensed to a US Semi-Conductor company for integration into a ultra-low power cellular IOT chip by T2M
• NXP Announces General Availability of the Arm Cortex-M33-based LPC551x/S1x MCU Family
• Memory Market Not Forecast to Exceed 2018 High of $163.3B until 2022
• Total Foundry Revenue to Undergo Single-Digit Growth in 2020, Owing to Deferred Seasonality from COVID-19
• Imagination showcases groundbreaking new safety-critical driver

Monday, April 27, 2020

• Mixel's MIPI D-PHY IP Integrated into the Lattice CrossLink-NX FPGA
• Khronos Group Releases OpenCL 3.0
• MediaTek to Enable Cutting-edge AV1 Video Codec Technology on Android Smartphones
• Synopsys Introduces 3DIC Compiler, Industry's First Unified Platform to Accelerate Multi-die System Design and Integration
• Imec Builds World's First Spiking Neural Network-Based Chip for Radar Signal Processing
• OmniVision Unveils World's First 0.7 Micron, 64 Megapixel Image Sensor for Ultra Thin, High End Smartphones
• Rianta Releases 400G MACsec IP Core for Ethernet Security Acceleration ASICs and SoCs

Sunday, April 26, 2020

• CFX announces commercial availability of anti-fuse OTP technology on CanSemi 0.18um Logic process
• GLOBALFOUNDRIES Dresden Certified to Manufacture Secure Products
• North American Semiconductor Equipment Industry Posts March 2020 Billings
• CFX announces commercial availability of anti-fuse OTP technology on CanSemi 0.18um Logic process
• Wave Computing Set to File Chapter 11, With MIPS the Likely Winner

Wednesday, April 22, 2020

• Why Apple needs to ditch Intel for ARM or RISC
• Faraday Reports First Quarter 2020 Revenues at NT$1,265 Million
• Codasip Releases Support Package for Western Digital's First RISC-V SweRV Core
• Chips&Media Now Reveals c.WAVE120 - New Generation of Super-Resolution HW IP
• Renesas Releases Major Update of Flexible Software Package Supporting RA Family of 32-Bit Arm Cortex-M Microcontrollers

Tuesday, April 21, 2020

• Debunking the Myth of China's AI Superiority
• IC Unit Shipments Forecast to Display First-Ever Back-to-Back Decline
• Korean Ministry of SMEs and Startups selects Arm Flexible Access to support local startup companies

Monday, April 20, 2020

• Global Semiconductor Sales in February Down 2.4 Percent Month-to-Month: SIA
• Unlocking AI on Arm Microcontrollers with Deep Learning Model Optimization
• CEVA Wins 2019 CEM Editor's Choice Award for its Bluetooth 5 IP
• SiPearl signs a major licensing agreement with Arm for the development of its first-generation of microprocessors
• Cadence Reports First Quarter 2020 Financial Results
• Imperas Leading RISC-V CPU Reference Model for Hardware Design Verification Selected by Mellanox
• New York Institute of Technology - Vancouver Develops Secure Boot Application for Gowin SecureFPGA
• Faraday Releases Licensable Gigabit Ethernet PHY on UMC 40LP Platform
• Silex Insight takes another key step to strengthen its presence in Israel by partnering with Beyond Electronics
• Imagination Commits to Keeping U.K. HQ - For Now

Sunday, April 19, 2020

• 5G and HPC Drive 45% Q1 Revenue Growth at TSMC

Thursday, April 16, 2020

• Arm receives first high assurance Common Criteria security certification for soft processor IP
• Silvaco Leverages Deep SOI Roots