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Sunday, December 22, 2024

• Synopsys' $35 bln Ansys acquisition to be approved in EU, sources say
• Everything Goes Up! Top Trends of 2024
• Micon Global and Silvaco Announce New Partnership
• QuickLogic Announces $6.575 Million Contract Award for its Strategic Radiation Hardened Program

Saturday, December 21, 2024

• Arm loses out in Qualcomm court case, wants a re-trial

Friday, December 20, 2024

• Alphawave Semi Scales UCIeâ„¢ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity

Thursday, December 19, 2024

• Europe okays Italy's €1.3 billion subsidy for chiplet fab
• With an Eye on TSMC, Rapidus Foundry Approaches 2nm Process
• Jury is out in the Arm vs Qualcomm trial
• Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
• Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
• Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU

Wednesday, December 18, 2024

• Enhancements to Creonic's DVB-S2X IP Cores for Greater Flexibility and Performance
• Third day for Arm vs Qualcomm trial
• RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
• VeriSilicon unveils next-generation high-performance Vitality architecture GPU IP series

Tuesday, December 17, 2024

• Soitec: Silicon Photonics to Power Next-Gen AI Data Centres
• Cadence Rolls Out System Chiplet to Reorganize the SoC
• Siemens extends Veloce hardware-assisted verification support of EPGM Ethernet to 1.6 Tbps
• Samsung Reportedly Considering Partnership with TSMC to Jointly Produce Exynos 2500
• Crypto Quantique adds TRNG to its quantum-derived, side-channel protected PUF hardware IP block
• ARM versus Qualcomm court case opens
• Andes Technology Partners with ProvenRun to Strengthen RISC-V Trusted Execution Environment
• Reimagining Video Excellence at CES 2025 with intoPIX

Monday, December 16, 2024

• Fraunhofer IAF expands technology capabilities for chiplet innovations within the APECS pilot line
• Chiplet Summit Features the Latest Chip Design Technology
• QuickLogic Announces Appointment of Andy Jaros as Vice President of IP Sales
• Synopsys and SiMa.ai Announce Strategic Collaboration to Accelerate Development of Automotive Edge AI Solutions
• BrainChip Awarded Air Force Research Laboratory Radar Development Contract
• M31 Unveils Full Range of Automotive IP Solutions at ICCAD Illuminating the Future of Automotive Chip Development
• sureCore teams with Sarcina to package cryo chips
• Dolphin Semiconductor transfers HQ to Canada
• Synopsys and SiMa.ai Announce Strategic Collaboration to Accelerate Development of Automotive Edge AI Solutions
• BrainChip Awarded Air Force Research Laboratory Radar Development Contract
• M31 Unveils Full Range of Automotive IP Solutions at ICCAD Illuminating the Future of Automotive Chip Development
• sureCore teams with Sarcina to package cryo chips
• Dolphin Semiconductor transfers HQ to Canada

Monday, December 16, 2024

• NVIDIA and TSMC Unveil Silicon Photonics Innovations at IEDM 2024
• Samsung and TSMC locked in intense 2nm chip competition
• SEMICON Korea 2025 to Spotlight Edge Technologies Shaping the AI Era
• European chiplet pilot line starts operations

Sunday, December 15, 2024

• Frontgrade Gaisler Leads European Initiative for Ultra Deep Sub-Micron Semiconductor Technology for Space Applications
• Industry Grade ASIL-B IP Cores licensed to Power Next-Gen Automotive Systems
• Frontgrade Gaisler Licenses BrainChip's Akida IP to Deploy AI Chips into Space

Thursday, December 12, 2024

• India's Semiconductor revolution: Opportunities for engineers
• Innovation and Collaboration: Powering Sustainable Exponential Growth

Thursday, December 12, 2024

• European Night: Celebrating European tech innovators at CES 2025

Wednesday, December 11, 2024

• Marvell partners with Micron, Samsung, and SK hynix on custom HBM
• TrendForce: Advanced Processes, Chinese Policies Drive 3Q 2024 Global Top 10 Foundry Revenue to Record Highs
• Silicon industry veteran Oreste Donzella joins Sondrel board as Non-Executive Director
• MosChip selects Cadence tools for the design of HPC Processor "AUM" for C-DAC
• Powering the NVM and Embedded Chip Security Technologies
• BBright Expands Ultra HD Capabilities with intoPIX JPEG XS Technology in its V2.2 Decoder Platform
• BOS and Tenstorrent Unveil Eagle-N, Industry's First Automotive AI Accelerator Chiplet SoC

Wednesday, December 11, 2024

• MosChip selects Cadence tools for the design of HPC Processor “AUM” for C-DAC

Tuesday, December 10, 2024

• Democratizing Chiplets
• TSMC founder: Intel should have prioritized AI over foundry
• Nordic's Thingy prototypes IoT products
• PIMIC Unveils Business Strategy, and Silicon Technology to Revolutionize AI at the Edge
• Jmem Tek and Andes Technology Partner on the World' s First Quantum-Secure RISC-V Chip
• Synopsys Announces Industry's First Ultra Ethernet and UALink IP Solutions to Connect Massive AI Accelerator Clusters
• Cadence and Rapidus Collaborate on Leading-Edge 2nm Semiconductor Solutions for AI and HPC Applications
• Quobly announces key milestone for fault-tolerant quantum computing
• CEA-Leti Demonstrates Embedded FeRAM Platform Compatible with 22nm FD-SOI Node
• MosChip selects Cadence tools for the design of HPC Processor "AUM" for C-DAC