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Monday, October 12, 2020

• South Korea pushes for AI semiconductors as global demand grows
• Imagination extends mobile GPUs to automotive and data centres with 6Tflop B-Series
• NVIDIA Reportedly Moving Ampere to 7 nm TSMC in 2021
• Arteris IP FlexNoC Interconnect Again Licensed by KYOCERA for Enterprise Printing and Imaging Solutions
• Synopsys Demonstrates Industry's First PCI Express 5.0 IP Interoperability with Intel's Future Xeon Scalable Processor
• Innosilicon Achieves World-First Tapeout Success on SMIC N+1 Process
• Innosilicon selects Imagination's new BXT Multi-Core GPU IP for cloud computing
• Imagination launches IMG B-Series: Doing more with multi-core
• Cadence Brings Verification IP to the Chip Level with New System VIP Solution
• New Cadence Clarity 3D Transient Solver Delivers Up to 10X Faster System-Level EMI Simulation
• Synopsys to Enable New Levels of Insight into SoC Designs and Systems with Industry's First Silicon Lifecycle Management Platform
• MIPI Alliance and IEEE Sign Agreement to Bring Automotive SerDes Standard to Broader Ecosystem
• OPENEDGES AI Accelerator (NPU) & Memory Subsystem IP licensed for Eyenix AI-powered surveillance camera chipset
• Synopsys Names Shankar Krishnamoorthy General Manager of the Digital Design Group

Sunday, October 11, 2020

• Arm co-founder: Nvidia takeover would create another US tech monopoly
• Menta Appoints ETSI as United States East Coast Representative
• AMD and Xilinx: A Match Made in Silicon Valley?
• Attend Andes Technology's Presentation "A RISC-V Out-of-Order Processor" at the Linley Processor Conference
• Visit Vidatronic at the Virtual GLOBALFOUNDRIES Technology Conference (GTC) - EMEA on October 16th
• Numem Selected by NASA for 'DNN Radiation Hardened Co-Processor Companion Chip to NASA's Upcoming High-Performance Spaceflight Computing Processor'
• Cadence Pegasus Verification System Certified for TSMC N16, N12 and N7 Process Technologies
• AMD-Xilinx Deal: Bringing The Fight To The Data Center
• Synopsys IC Compiler II Delivers First-Pass Silicon Success for Graphcore's Multi-Billion Gate AI Processor
• AMD Reported to Be Negotiating Purchase of Xilinx
• intoPIX Ships v2.0 of FastTICO-XS SDK for x86-64 CPU platforms to speed up JPEG-XS workflows

Thursday, October 8, 2020

• Imec presents alternative metals in advanced interconnect and contact schemes as a path to 2nm technology nodes

Wednesday, October 7, 2020

• proteanTecs Announces Market and Regional Expansions
• Synopsys DesignWare CXL IP Supports AMBA CXS Protocol Targeting High-Performance Computing SoCs
• Instrumentation Technology Systems adds intoPIX TICO-XS to their upcoming NetVIDxs
• Huang "Confident" Nvidia-Arm Deal Will Get Past Regulators
• Attopsemi's I-fuse Memory Solution Now Qualified and Available on X-FAB's 130nm RF-SOI Technology
• TSMC September 2020 Revenue Report
• UMC Reports Sales for September 2020
• Intento Design Expands Analog Automation with IDX-PVT, Eliminating the Need for Design-by-Verification
• Pushing the boundaries of performance and security to unleash the power of 64-bit computing
• Think Silicon to introduce a new Inference Micro GPU Architecture based on RISC-V at Linley Fall Virtual Processor Conference
• Cadence Announces Complete DDR5/LPDDR5 IP Solution for TSMC N5 Process Technology

Tuesday, October 6, 2020

• Arm CEO Simon Segars discusses AI, data centers, getting acquired by Nvidia and more
• SmartDV Unveils SmartConf Testbench Generator
• CAST Introduces Ultra-Low Latency TSN Ethernet Switch IP Core
• VSORA Introduces Small Footprint, Low-Power PetaFLOPS Platform Enabling L4/L5 Autonomous Driving
• Everactive Adopts Movellus Sub-Microwatt Clocking Solution for its Batteryless IIoT System

Monday, October 5, 2020

• AI Requires Tailored DRAM Solutions: Part 3
• European Semiconductor Sales Drop, Global Sales Rise
• Top 10 Tech Industry Trends for 2021
• 'Samsung AI Forum 2020' Explores the Future of Artificial Intelligence
• Efinix® Announces Availability of Reconfigurable Acceleration Platform
• Eximius Design Joins TSMC Design Center Alliance Program
• Renesas Launches Arm Cortex-M33-based RA6M4 MCU Group with Superior Performance and Advanced Security for IoT Applications

Sunday, October 4, 2020

• Nvidia Presents the DPU, a New Type of Data Center Processor
• China's Chip Sector Faces Possible Impact as SMIC Assesses Export Restrictions Placed by U.S.
• ESD Alliance Reports Strong Electronic Design Automation Industry Revenue Growth for Q2 2020
• TurboConcepts successfully completes research project FlexDEC-5G for designing FEC decoders for 5G
• Imagination Technologies Group Ltd. Announces new CEO Simon Beresford-Wylie
• Intel's Roadmap: A Closer Look at Process Technologies and Production Plans
• Arm Spins-out Cerfe Labs to Advance Development of CeRAM Memory Technology
• Toshiba Information Systems Adopts Blue Pearl Software Visual Verification Suite by to Improve Quality and Accelerate FPGA and ASIC Development
• China's Semiconductor Industry to Brace for Impact as SMIC Assesses Export Restrictions Placed by U.S., Says TrendForce
• Global Semiconductor Sales Increase 4.9 Percent Year-to-Year in August
• GUC Monthly Sales Report - September 2020
• OpenFive and AnalogX to Provide Optimized Chip-to-Chip Interface IP Solutions

Saturday, October 3, 2020

• EU chip plan would cost €500bn, says NXP CEO

Wednesday, September 30, 2020

• Talking Sense with Moortec... 5G, Hyperscaling and the Resurgence of Consumer Silicon
• Arm Mali-C71AE: High performance Image Signal Processing with Advanced Safety
• Arteris IP to Acquire Assets of Magillem Design Services, Creating World's Premier System-on-Chip Assembly Company
• Efabless Extends Partnerships for Rapid Development Solution of Custom ICs
• Efinix Announces Availability of Reconfigurable Acceleration Platform
• New MIPI Debug and Trace Solution Available for Mobile, IoT and Automotive
• Renesas Selects Andes RISC-V 32-Bit CPU Cores for its First RISC-V Implementation of ASSPs