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Thursday, June 11, 2020

• A guide to accelerating applications with just-right RISC-V custom instructions
• NXP Selects TSMC 5nm Process for Next Generation High Performance Automotive Platform

Wednesday, June 10, 2020

• Efinix Completes Trion FPGA Family for Edge Computing, AI/ML and Vision Processing Applications Using Cadence Digital Full Flow Solution
• SkyWater Licenses Key FDSOI Technology from MIT Lincoln Laboratory, Moves Up Availability of its 90 nm Strategic Rad-Hard by Process Offering
• Qualcomm Retakes Market Leadership in 1Q20 Revenue Ranking of Global Top 10 IC Design Companies, Says TrendForce
• Semiconductor Fabs to Log Record Spending of Nearly $68 Billion in 2021 After 2020 Lull, SEMI Reports
• Real Intent Announces Verix Multimode DFT Static Sign-Off Tool
• Total Foundry Revenue Increases by 20% YoY in 2Q20, While Market Uncertainties Remain in 2H20, Says TrendForce
• Silex Insight Announces Record-breaking 1.5Tb MACsec Solution To Boost Data Center and 5G Infrastructure
• Arm falls out with Arm China
• Truechip Announces Shipping of Performance Analyzer Tool Kit to Aaroh Labs
• DSP Group Strengthens its Position in Rapidly Growing Headset Market with Acquisition of SoundChip SA

Tuesday, June 9, 2020

• RISC-V crypto core is qualified to ASIL-D for automotive designs
• Semiconductor fab spending to roar back in 2021
• Soitec reports full year'20 results
• RISC-V crypto core is qualified to ASIL-D for automotive designs
• TSMC to Face Inventory Glut Caused by US-China Trade War
• Arm China CEO: Good or Gone?
• Moortec Launches New In-Chip Technology for Highly Distributed, Real-Time Thermal Analysis on TSMC N5 Process
• Synopsys Acquires Semiconductor Analytics Innovator Qualtera
• TSMC May 2020 Revenue Report
• Synopsys Delivers the Industry's Only Complete Workflow for Automotive Lighting Design and Visualization in CATIA

Monday, June 8, 2020

• Smart and Secure Embedded Solutions for IoT Design
• IAR Systems and GigaDevice collaborate to bring powerful RISC-V solutions to the market
• SmartDV's Design and Verification Solutions Portfolio Surpasses 600 Offerings
• Arteris IP Advances onto List of Top 15 Semiconductor IP Vendors
• TSMC Discloses "Secret" 4nm Node

Sunday, June 7, 2020

• The aspects of 6G that will matter to wireless design engineers
• Configuring Processors In The Field
• GUC Monthly Sales Report - May 2020
• Sampling of 2Q Semiconductor Sales Guidance Now At -5%
• UMC Reports Sales for May 2020
• Andes Technology Steps Up to Premier Membership in RISC-V International; Greatly Expanding its U.S. R&D and Field Application Engineering Staffing
• Mentor joins the O-RAN ALLIANCE to help drive interoperability requirements for 5G network silicon

Friday, June 5, 2020

• Auto Sector Stuck in Neutral as a Few IC Makers Recover

Thursday, June 4, 2020

• Huawei's proposal to replace TCP/IP is going nowhere fast

Wednesday, June 3, 2020

• Nolam Embedded Systems discloses the MIL-STD1553 solution integrated on REFLEX CES Arria 10 SoC Module
• IAR Systems launches support for the RISC-V P extension for Packed-SIMD instructions
• SmartDV Delivers New Design IP for Video, Imaging, Entertainment System Protocols
• Synopsys Accelerates FIPS 140-3 Certification with NIST-Validated True Random Number Generator IP

Tuesday, June 2, 2020

• Former General Manager of GlobalFoundries China joins SMIC
• Lattice Accelerates FPGA-Based Processor Design With New IP Ecosystem and Design Environment
• The Increasingly Ordinary Task Of Verifying RISC-V
• GPU Market Provides a Ray (Tracing) of Hope
• Green Hills Software Adds Industry-Leading Advanced Software Development Tools Support for RISC-V
• Cadence Achieves Digital and Custom/Analog EDA Flow Certification for TSMC N6 and N5 Process Technologies
• Efinix Announces Availability of Three RISC-V SoCs
• Synopsys Introduces Industry's First Complete USB4 IP Solution
• MIPI Alliance Completes Development of A-PHY v1.0, an Industry-Standard Long-Reach SerDes Physical Layer Interface for Automotive Applications
• Enyx launches an ultra-low latency development framework for building standardized, FPGA-based trading systems
• Securing the Internet of Things in a Quantum World
• MediaTek Will Not Illegally Supply TSMC Chips To Huawei
• SMIC plans to raise $2.8 billion as the US tries to hamper China's Semiconductor growth

Monday, June 1, 2020

• Collaboration focuses on development tools for RISC-V-based MCUs
• PUFsecurity IP Open Source Program: Bridging the Gap in Chip Security
• NEUCHIPS Announces World's First Deep Learning Recommendation Model (DLRM) Accelerator: RecAccel
• First-Quarter 2020 Global Semiconductor Equipment Billings Up 13 Percent Year-Over-Year
• UltraSoC enables ultra-high-speed closed-chassis analytics and debug over Synopsys USB3
• Codasip Extends SweRV Support Package to Include Western Digital SweRV EH2 & EL2 RISC-V Cores
• GigaDevice GD32 MCU and Amazon AWS Launch New Embedded Cloud Platform
• Imagination announces next-generation IEEE 802.11ax/Wi-Fi 6 IP for low-power applications

Sunday, May 31, 2020

• Don't Let Baggage Hinder Innovation: RISC-V Lets Us Start with a Clean Slate
• DARPA Marries IC Security with System-Level Synthesis
• Dolphin Design unveils SPIDER, a turnkey platform to accelerate the design of energy efficient power management systems
• Global Semiconductor Sales Decrease 1.2 Percent Month-to-Month in April
• Synopsys Fusion Design Platform and DesignWare IP Selected by Baikal Electronics to Deliver Latest High-Performance Computing SoC
• Ambarella Adopts Cadence Clarity 3D Solver for AI Vision Processor Development
• Cloud Computing Is Changing Everything About Electronic Design
• Seamless Microsystems announces a major design-win
• Samsung Foundry Certifies Synopsys Design Compiler NXT for 5/4nm FinFET Process Technologies