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Tuesday, March 25, 2025

• Siemens is European patent champion
• Cadence Launches Conformal AI Studio, Improves SoC Productivity by 10x

Monday, March 24, 2025

• Spanish government invests €13.8m in 5G satellites
• Renesas Introduces Low-Power Bluetooth Low Energy SoC for Automotive Applications
• AI platform enables customisable packaging solutions for AI applications
• Fraunhofer to show AI, robotics and connected data for healthcare
• Rapidus Announces Strategic Partnership with Quest Global to Enable Advanced 2nm Solutions for the AI Chip Era

Monday, March 24, 2025

• Delivering sustainable electronics manufacturing

Sunday, March 23, 2025

• Accellera Announces IEEE Standard 1801â„¢-2024 is Available Through IEEE GET Program
• Strategies for Addressing More Complex Custom Chip Design
• EnSilica Agrees a Multimillion Pound Design and Manufacturing Services Contract
• M31 Technology - AI-Powered Automotive Dual Engines and 2nm Technology Boost Revenue to Record Highs
• 'World-Leading' Semiconductor Design Centre Will 'Strengthen Wales' Leadership in Chip Design'
• Accellera Announces IEEE Standard 1801?-2024 is Available Through IEEE GET Program
• Brite Semiconductor Releases DDR3/4, LPDDR3/4 Combo IP
• SoCs Get a Helping Hand from AI Platform FlexGen

Thursday, March 20, 2025

• Silvaco Announces Departure of Chief Financial Officer
• Hong Kong investment arm backs Chinese RISC-V start-up StarFive in tech push

Wednesday, March 19, 2025

• Embedded World, Nuremberg: Nordic Semiconductor's Strategy for Secure and Efficient IoT Connectivity
• QuickLogic Announces the Amendment and Extension of Credit Facility
• Vayavya Labs At The ADAS Show 2025
• Siemens Xcelerator: Siemens accelerates IT and OT integration with Microsoft for Edge, Cloud, AI and Simulation
• Synopsys: Autonomous AI Agents to Tame Chip Design Complexity
• Dnotitia and HyperAccel Partner to Develop RAG-Optimized AI Inference System
• Omni Design Technologies Delivers Multi-Gigahertz SWIFTâ„¢ Data Converter Solutions for Satellite Communications
• Zero ASIC launches world's first open standard eFPGA product
• Global Top 10 IC Design Houses See 49% YoY Growth in 2024, NVIDIA Commands Half the Market, Says TrendForce
• SoftBank Group to Acquire Ampere Computing
• Omni Design Technologies Delivers Multi-Gigahertz SWIFT™ Data Converter Solutions for Satellite Communications
• Menta Unveils 'Launch Pad' Low-Cost Embedded FPGA (eFPGA) Technology Access Program For Defense And Aerospace Customers

Tuesday, March 18, 2025

• Accellera Announces IEEE Standard 1801™-2024 is Available Through IEEE GET Program
• Soitec contributes to accelerated development of integrated optical connectivity solutions for AI datacentres with its silicon photonics SOI technology
• FAMES Pilot Line Launches Open-Access Call for Chip Industry
• Cycuity Collaborates with SiFive and BAE Systems to Demonstrate Advanced Microelectronics Design Supply Chain Security
• Comcores is now a member of the OPEN Alliance
• KiviCore and CAST Release Post-Quantum Cryptographic Key Encapsulation IP Core
• Sofics and Dolphin Semiconductor Announce Strategic Partnership

Monday, March 17, 2025

• Cadence Recognized as One of Fast Company's Most Innovative Companies of 2025
• Quantum computing shows strong growth into the datacenter
• PQShield Ltd - PQShield Podcast
• Canada Funds Quantum Auto Security Research
• Speeding AI and HPC Workloads with Composable Memory and Hardware Compression / Decompression Acceleration
• GlobalFoundries' expansion starts despite CHIPS Act questions
• Cadence Accelerates AI-Driven Engineering Design and Science with NVIDIA Grace Blackwell
• Synopsys Accelerates Chip Design with NVIDIA Grace Blackwell and AI to Speed Electronic Design Automation
• Arteris Selected by Nextchip to Accelerate Chip Designs for Automotive Vision Technology

Monday, March 17, 2025

• Samsung Rumored to Mull on Scrapping 1.4nm Node to Prioritize 2nm/3nm Yield Gains
• The Transformative Growth Potential of the Semiconductor Industry

Sunday, March 16, 2025

• Cadence Joins Intel Foundry Accelerator Design Services Alliance
• TSMC and MediaTek Demonstrate First Integrated PMU and PA for Wireless Connectivity Products on N6RF+ Process Technology
• Andes Technology Achieves Record Annual Revenue Amid Strong AI Demand
• Automotive Ethernet PHY IP Core in 28nm with BroadR-Reach and 100BaseT1 Compatibility for Automotive Applications
• SerDes Hard Macro IP in GlobalFoundries 22FDX - Available For Licensing and Implementation from Global IP Core
• China Bets on Homegrown Chip Tech With RISC-V Push
• The Case for Hardware-Assisted Verification in Complex SoCs

Thursday, March 13, 2025

• InPsytech Joins Intel Foundry Accelerator IP Alliance to Boost HPC, AI, And Automotive Applications

Thursday, March 13, 2025

• Japan's Rapidus Preps 2nm Foundry Process And Chiplets
• Open-source chip design spurring on AI

Wednesday, March 12, 2025

• Perforce Releases 2025 Automotive Software Report: AI Adoption, Safety Priorities, and Code Complexity Challenges
• Renesas targets high volume vision AI with DRP AI core
• Phonemic Officially Registered as Semiconductor Design Center with Polish Space Agency, Strengthening Position in Space Technology
• Intel's New CEO Called "Strong Choice" to Respin Company
• GUC Announces Successful Launch of Industry's First 32G UCIe Silicon on TSMC 3nm and CoWoS Technology