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Wednesday, June 19, 2019

• Western Digital Extends Openness of PlatformIO and Enhances its RISC-V Portfolio to Accelerate Data-Centric Innovation
• ON Semiconductor Completes Acquisition of Quantenna Communications
• "Video For Machines" Using MPEG's New CDVA Standard, On Gyrfalcon's Industry Leading Chips
• Purdue & TSMC Partner to Enhance Chip Security
• Attopsemi Technology's Notification of Office Relocation
• eSilicon, Samtec and Wild River Technology Offer High-Performance Communications Webinar

Tuesday, June 18, 2019

• Arm joins Trusted Computing Group, driving towards secure devices everywhere
• China sees Taiwan supply chain as alternative to IDMs for power IC devices
• CSEM and MIFS demonstrate world-record lows in energy consumption for a microcontroller
• Acacia Communications Adopts Cadence Palladium Z1 Enterprise Emulation Platform to Accelerate Optical Networking Development
• Nurlink Completes First Call on Commercial NB-IoT Network with its CEVA-powered eNB-IoT SoC
• U.S. Companies Dominate Worldwide IC Marketshare
• PCI-SIG Announces Upcoming PCI Express 6.0 Specification to Reach 64 GT/s

Monday, June 17, 2019

• Samsung Electronics to Strengthen its Neural Processing Capabilities for Future AI Applications
• "Video For Machines" Using MPEG's New CDVA Standard, On Gyrfalcon's Industry Leading Chips
• GLOBALFOUNDRIES Adds Industry Veteran Glenda Dorchak to its Board of Directors to Support Next Phase of Transformative Growth
• Can Huawei Survive?
• SiFive Enhances Silicon Hills Operations with Office in Austin, Texas
• Xilinx Hits Milestone with First Customer Shipments of Versal ACAP
• Achronix Selects Moortec's 7nm Embedded Temperature Sensor to Optimise Performance and Reliability in its 4th Generation Speedster FPGA
• Arteris IP FlexNoC Interconnect Licensed by Achronix for New Speedster7t FPGA family
• Astera Labs Verifies Its System-Aware PCI Express 5.0 Smart Retimer Using Avery Design Systems PCIe 5.0 Verification IP
• Telechips selects PowerVR GPU for Automotive
• NVIDIA Brings CUDA to Arm, Enabling New Path to Exascale Supercomputing
• Chiplet Ecosystem Slowly Picks up Steam

Sunday, June 16, 2019

• At the Paris Air Show 2019 Cobham will be showcasing its unique role in the world.
• Introducing Intel's New Network and Custom Logic Group
• Global Top Ten Foundries for 2Q19 Perform Less-than-expected Due to Sliding Demand and High Inventories, Says TrendForce
• Moortec to Showcase its PVT Monitoring IP at TSMC China Technology Symposium
• UltraSoC joins GSA IoT Security Working Group
• Can We Believe The Hype About China's Domestic IC Production Plans?

Wednesday, June 12, 2019

• Why do Enterprises favor private or hybrid IoT deployments over public clouds?
• Toshiba Selects Cadence Tensilica Vision P6 DSP as Image Recognition Processor for its Next-Generation ADAS Chip
• UltraSoC strengthens management team with appointment of CFO
• X-FAB and Efabless Announce Successful First Silicon of Raven, An Open-Source RISC-V Microcontroller
• Mythic Secures $30M in New Financing and Strengthens Leadership Team

Wednesday, June 12, 2019

• IC Compiler II with Advanced Fusion Technologies Delivers Optimal QoR and Reduces ECO Turnaround Time More Than 40% at Juniper Networks

Tuesday, June 11, 2019

• Media Alert: Cadence to Showcase Aerospace and Defense Solutions at the 2019 International Paris Air Show
• Gartner Identifies Five Challenges to Growth and Adoption for Virtual Customers
• Report: Apple Still Eyes Intel's Modem Business
• AI: Friend or Foe?
• Everspin Enters Pilot Production Phase for the World's First 28 nm 1 Gb STT-MRAM Component
• Synopsys Achieves ISO 9001 Certification for IP Quality Management System
• Global Fab Equipment Spending to Rebound in 2020 with 20 Percent Growth
• Magewell Selects Lattice Semiconductor ECP FPGA Family For Video Capture Devices

Monday, June 10, 2019

• India's IC Imports Grew Dramatically in 2018, and U.S.-China Trade Tensions Could be a Reason
• RISC-V Foundation Announces Call For Papers For The 2nd Annual RISC-V Summit
• The Point Where IoT, AI & Quantum Computing Intersect
• Cobham Releases New Instruction Simulator for Radiation Hardened Processors
• intoPIX Presents the Smart Path for AV Over IP at InfoComm 2019
• Intel to Acquire Barefoot Networks, Accelerating Delivery of Ethernet-Based Fabrics
• Dream Chip opened new ASIC Design Center in Eindhoven, Netherlands
• Silicon-Proven Arteris IP Ncore Cache Coherent Interconnect Implemented in Toshiba ISO 26262-Compliant ADAS Chip
• Logic Design Solutions Introduces the first NVMe Host IP on PolarFire FPGA
• HDL Design House Adds New Representative in Europe
• Gyrfalcon's 2803 Plai Plug Development Hardware Delivers 24 TOPS/W for AI From Edge to Cloud

Sunday, June 9, 2019

• Andes Technology Launches RISC-V FreeStart Program with its Commercial-Grade CPU N22
• UMC Reports Sales for May 2019
• Imperas and Metrics Collaborate to Jump Start RISC-V Core Design Verification Using Open Source Instruction Stream Generator
• TSMC May 2019 Revenue Report
• CEVA Collaborates with Ellisys to Achieve SIG Qualification for its Bluetooth 5.1 Low Energy IP
• Space Codesign Systems Announces Support of Zynq UltraScale+ MPSoC
• SingMai offer universal encoding and decoding of analogue video