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Monday, February 9, 2026

• RISC-V IP Core: T2M to Present Production-Proven RISC-V IP Core at Mobile World Congress, 2026
• Record quarter for Arm
• European firms eye investments in finance, semiconductors, AI in Vietnam
• STMicroelectronics expands strategic engagement with Amazon Web Services to enable new high performance compute infrastructure for cloud and AI data centers
• Inside FAMES: How Europe Depends on RTO Collaboration
• 2026 Outlook with Coby Hanoch of Weebit Nano
• Dnotitia Readies IPO After Turning AI Memory Bottlenecks into a New Semiconductor Category
• Biodegradable PCB targets short-lifetime electronics
• Tower Semiconductor & Nvidia team up on 1.6T silicon photonics for AI data centers
• Siemens unveils virtualised substation protection platform
• EnSilica joins CHERI Alliance to boost chip security
• Fabless Startup Aheesa Tapes Out First Indian RISC-V Network SoC
• FAMES pilot line inaugurated after delivering first validated semiconductor results
• Synopsys Lightmatter Alliance Highlights Bet On AI Chip Connectivity IP
• Chiplets Get Physical: The Days of Mix-and-Match Silicon Draw Nigh
• GF partners with Telsys to expand Israel presence
• TSMC to make advanced 3nm chips in Japan
• Phison Selects Andes RISC-V Cores for its First aiDAPTIV+ AI Solution, Marking a Major Milestone in AI Architecture
• VeriSilicon Enhanced ISP8200-FS Series IP Achieves ASIL B Functional Safety Certification
• Omni Design Technologies Advances 200G-Class Co-Packaged Optics IP Portfolio for Next-Generation AI Infrastructure
• Exclusive Interview: Mika Jäsberg Discusses CoreHW’s RTLS Offering

Thursday, February 5, 2026

• TES offers a programmable precision DC voltage amplifier IP for X-FAB’s XT018 technology
• Chiplets Reach an Architectural Turning Point – Menta at Chiplet Summit 2026
• Analogue Insight Safe Announces AISAFE Digital Noise Source IP for Scalable Performance Hardware Entropy Sources in ASICs
• STMicroelectronics expands sensors capabilities with closing of acquisition of NXP’s MEMS business
• SiTime to Acquire Renesas’ Timing Business
• Semiconductor Fabs Announce New Plans to Rebalance Capacity and Control
• GUC Monthly Sales Report – Jan 2026
• Lam Research and CEA-Leti Expand Research and Development Collaboration to Advance Fabrication of Specialty Technologies
• Keysight and Point2 Technology Collaborate to Advance Next-Generation AI Scale-Up Interconnects
• Siemens acquires Canopus AI to bring AI-based metrology to semiconductor manufacturing
• IBM, Synopsys Move Toward 1.4-nm Node with Heat-Modeling Tech

Wednesday, February 4, 2026

• Arasan's ultra low power MIPI D-PHY IP achieves ISO26262 Certification
• UK-Bulgaria partnership set to boost semiconductor innovation
• Dassault Systèmes and NVIDIA Partner to Build Industrial AI Platform Powering Virtual Twins
• IntoPIX And Cobalt Digital Enable Scalable, Low-Latency IPMX Video With JPEG XS TDC At ISE 2026
• Attopsemi Scales I-fuse® Technology to 7nm FinFET following 12nm Silicon Success

Tuesday, February 3, 2026

• Semidynamics Unveils 3nm AI Inference Silicon and Full-Stack Systems
• Andes Technology Launches RISC-V Now! — A Global Conference Series Focused on Commercial, Production-Scale RISC-V

Monday, February 2, 2026

• UMC expects revenue to outpace market growth
• Two Semiconductor Fab Projects Abruptly Halted?
• A new era for European semiconductors begins in Grenoble
• Semiconductor industry starting to show signs of recovery
• Microservice Store Launches EU CRA and UK PSTI Autonomous Compliance Solution for IoT
• De-risking the Start of Production for Automotive SoCs
• Synopsys and AMD Honored by World Economic Forum for Generative and Agentic AI Vision, Leadership, and Impact
• Arasan announces the immediate availability of the industries first xSPI NOR + eMMC NAND Combo PHY IP
• MIPS accelerates the development timeline of the RISC-V NPU S8200, integrating Synopsys ARC IP to transform into a "physical AI" computing platform.
• Indian Chip Design Services Provider Mirafra Tapes Out 22-nm SoC
• Keysight’s Machine Learning Toolkit to Speed Device Modeling and PDK Dev
• How Chiplets will Accelerate Storage
• Samsung Foundry Reportedly Expects 30%+ 2nm Order Growth in 2026; 1.4nm Set for 2029
• TGE302 RISC-V IP Core: M0+, Comparable Performance Low-Power General-Purpose Processor

Friday, January 30, 2026

• Qualitas Semiconductor Secures Strategic IP Licensing Agreement for MIPI Solutions

Thursday, January 29, 2026

• Chips for Defence; an EU initiative
• Europe’s leadership in photonic chips under threat
• Lightmatter and Cadence Collaborate to Accelerate Optical Interconnect for AI Infrastructure
• Veeco and imec develop 300mm compatible process to enable integration of barium titanate on silicon photonics
• NanoXplore and STMicroelectronics deliver European FPGA for space missions
• MosChip Completes 28-nm SoC for India’s Space Center
• Tenstorrent Announces Participation in CHASSIS Program, Joint Initiative for Automotive Chiplet Technology
• The OpenHW Foundation unveils the first industry-ready RISC-V ecosystem to advance European digital sovereignty
• MIPS Takes ‘Software-First Approach’ With New RISC-V NPUs
• Keysight Launches Wireless Coexistence Test Solution to Accelerate Compliance and Innovation
• Chiplet Summit Announces Pre-Conference Day Schedule
• NVIDIA Looks to Intel’s 18A/14A Process and EMIB Packaging for Next-Gen Feynman AI Chips, Signaling a Major Foundry Shift Beyond TSMC

Wednesday, January 28, 2026

• Nuclei Announces Strategic Global Expansion to Accelerate RISC-V Adoption in 2026
• TES is extending its PMU IP portfolio for X-FAB’s XT018 - 0.18µm BCD-on-SOI technology.