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Tuesday, September 17, 2024

• SiFive Highlights Key Inflection Points Driving RISC-V Adoption for AI and Introduces Intelligence XM Series for AI Workload Acceleration
• RaaS, a collaborative initiative, adopted Menta's eFPGA technology for RaaS Edge Computing platform
• Cracks Emerge in U.S. CHIPS Act
• Chiplet Summit 2024 Shows How Advanced Packaging Keeps Moore's Law Alive
• Cadence Tensilica HiFi 5 DSPs Used in NXP's Next-Gen Audio DSP Family
• Cadence boss on what's wrong with India's semiconductor plan
• Alphawave Semi to Showcase Latest Advances in AI Connectivity IP at ECOC 2024

Monday, September 16, 2024

• Ultralight Edge AI Platform Unveiled
• More than 30 Projects, Overview of China's Semiconductor Industry Project Progress in 2024
• Intel signs up AWS for AI chips, splits off foundry business
• How the FPGA Came To Be, Did General Electric invent the PLD and EPLD in 1971?
• Chinese researchers develop ultra-efficient AI processor
• Andes core wins control slot in Rivos' RISC-V SoC
• Joachim Kunkel Joins Arteris Board of Directors
• Intel and AWS Expand Strategic Collaboration, Helping Advance U.S.-Based Chip Manufacturing

Monday, September 16, 2024

• Taking 5G into space

Sunday, September 15, 2024

• A message from Intel CEO Pat Gelsinger to employees regarding the next phase of Intel's transformation
• The CAN XL Controller IP Core with a complete safety package is now available for immediate licensing to high-end automotive and consumer applications
• Thalia launches AI-powered Layout Automation software with AMALIA 24.3
• Omni Design Technologies Partners with Aura Intelligent Systems on Next Generation Radar
• intoPIX Pre-Releases New JPEG XS IP-Cores & SDK with Master and Proxy Encoding at IBC 2024
• Expedera Appoints Siyad Ma as New CEO to Drive Expansion, Innovation
• Arm Accelerates AI From Cloud to Edge With New PyTorch and ExecuTorch Integrations to Deliver Immediate Performance Improvements for Developers

Saturday, September 14, 2024

• Samsung Secures US AI Chip Firm "Ambarella" Orders For Its 2nm Process, Signaling A Breakthrough

Thursday, September 12, 2024

• The Funding Gap in Green Technology: A Barrier to Progress
• SEALSQ Adopts RISC-V the Open-Standard RISC-V Architecture; Achievement Aligns with Rising Global Demand for Edge-AI and Machine Learning Applications
• NIST Releases First 3 Finalized Post-Quantum Encryption Standards
• Logic Design Solutions launches a new version of its NVMe HOST IP Targeting embedded recorder systems
• Enosemi and GlobalFoundries announce the availability of silicon-validated electronic-photonic design IP available in the GF Fotonix platform
• Arm Announces Appointment of Young Sohn to its Board of Directors

Wednesday, September 11, 2024

• Samsung's 2nm Yield Rate at Most 20%, Withdraws Personnel from Texas Taylor Plant
• intoPIX Launches Access Program for Titanium Viewer and Titanium Show Apps at IBC 2024 Amsterdam
• Imagination Announces Highest Performance Automotive GPU IP with FuSa Advancement
• Chevin Technology, Alpha-Data & Correct Designs collaborate to deliver fast and secure data offload for NASA-JPL's Airborne Visible/Infrared Imaging Spectrometer-3 (AVIRIS-3)
• Axiomise launches Essential Introduction to Practical Formal Verification Training

Tuesday, September 10, 2024

• Bluetooth 6.0 Channel Sounding is Here
• Sondrel appoints new Head of Projects
• Rivos Selects Andes NX45 for Control Functions in Upcoming High-Performance RISC-V SoC
• Logic Fruit Launches the Advanced Kritin iXD 6U VPX Single Board Computer (SBC)
• China wants to challenge the U.S. in AI – here's what Chinese giants are doing with the tech

Tuesday, September 10, 2024

• Intel Architects Start RISC-V Business with AheadComputing

Monday, September 9, 2024

• ZeroPoint Technologies Releases New Hardware-Accelerated Memory Optimization Solutions and Receives Industry Recognition for Innovation
• Xiphera Develops Quantum-Resilient Hardware Security Solutions for Space
• TSMC August 2024 Revenue Report
• Synopsys Powers World's Fastest UCIe-Based Multi-Die Designs with New IP Operating at 40 Gbps
• Sondrel announces Advanced Modelling Process for AI chip designs
• Rambus Announces Industry-First HBM4 Controller IP to Accelerate Next-Generation AI Workloads
• intoPIX and BCnexxt Join Forces to Revolutionize Live Playout with JPEG XS Technology
• Faraday Unveils Advanced Packaging Coordinated Platform for Multi-source Chiplets
• EXTOLL collaborates with PsiQuantum as a Key Partner for High-Speed SerDes IP
• BrainChip Identifies Advantages to Radar and Lidar Systems Leveraging Event-Based AI
• Arteris Interconnect IP Selected by VeriSilicon for High-Performance SoC Design

Sunday, September 8, 2024

• Inspired by neurons: Neuromorphic hardware and the future of chip design
• Tenstorrent and Movellus Form Strategic Engagement for Next-Generation Chiplet-Based AI and HPC Solutions
• T2M IP Unveils Advanced H.264 and H.265 HEVC Codec IP Cores for High-Efficiency Video Solutions
• SMIC cuts capex and R&D
• Semidynamics on major recruitment drive for RISC-V software engineers
• Qualitas Semiconductor Enters into Landmark the World's 1st 2nm MIPI DCPHY Licensing Agreement with Leading U.S. Fabless Company
• Lack of Fresh Money Threatens Green Tech Sector
• Alphawave Semi "Redefines Connectivity" in AI Hardware and Edge AI Summit 2024 Presentation on Chiplet Interconnects
• Advancing AI the Brazilian Way: Fostering Innovation Through Collaboration and Open Standards

Thursday, September 5, 2024

• U.S. seeking export controls on quantum computing; limited impact expected for S. Korean firms
• Samsung Partners with TSMC, Its Foundry Rival, on HBM4 Development
• Qualcomm Rumored to Consider Acquiring Parts of Intel's Chip Design Business, with a Focus on PC Segment
• China's DRAM Expansion Raises Concerns, Potentially Impacting Samsung and SK hynix Profits
• Adani Group partners Israel's Tower Semiconductor to build $10 billion chip plant in India: All details