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Friday, November 3, 2017

• Crypto Bugs in IEEE Standard Expose Intellectual Property in Plaintext
• Prioritise securing Internet of Things

Thursday, November 2, 2017

• Renesas Electronics has introduced 3D graphics dashboards to entry-level models with its R-Car D3 SoC
• Synopsys to Pay $565 Million for Security Software Firm
• New Laser Technique Promises Photonic Devices Inside of Silicon
• Xilinx Announces Intention to Invest $40M in Expansion of Research, Development, and Engineering Operations at EMEA Headquarters in Ireland

Thursday, November 2, 2017

• Architectures Battle for Deep Learning

Thursday, November 2, 2017

• Asic Land Co. Ltd Licenses Andes Technology Corp. N1337 with Single-Precision Floating-Point Unit for Voice Recognition Application

Thursday, November 2, 2017

• CEVA, Inc. Announces Third Quarter 2017 Financial Results

Thursday, November 2, 2017

• Faraday Reports EPS NT$0.50 for Third Quarter 2017

Wednesday, November 1, 2017

• FADU Completes Verification of next generation NVMe eSSD using S2C's Prodigy Virtex UltraScale Prototyping Platform
• Synopsys to Enhance Software Integrity Platform with Acquisition of Black Duck Software
• Apple May Drop Qualcomm Chips
• Semiconductor Sales Hit $108 Billion in Q3
• ArterisIP Expands Worldwide Engineering Centers of Excellence and Talent Roster
• Intrinsic ID Signs Agreement with Open Security Research for China Representation
• Xilinx Announces Appointment of Two New Directors
• Faraday Reports EPS NT$0.50 for Third Quarter 2017 Gross Margin 52.5%, Reaches a 3 Year-High
• Higher DRAM Bit Growth Seen For 2018
• DecaWave Deploys Synopsys TetraMAX II ATPG on Latest Automotive Design to Lower Test Time 50 Percent and Speed Runtime by 10x
• Andes, Rockchip to Join FD-SOI Club

Tuesday, October 31, 2017

• Saving Power with Temperature Compensation
• Hardent Delivers Interoperable VESA DSC IP Solution for the New Arm Mali-D71 Processor
• Mercury Systems Announces Safety Certifiable Graphics for Xilinx Zynq UltraScale+ MPSoC
• Moortec to exhibit their embedded In-Chip Monitoring Subsystem IP at the 2017 TSMC China OIP Ecosystem Forum in Shenzhen
• Cadence to Expand High-Speed Communications IP Portfolio with Acquisition of nusemi inc
• Synopsys Accelerates FIPS 140-2 Certification with NIST-Validated Cryptography IP Software Library
• UltraSoC embedded analytics selected by ELVEES for video, security and safety applications across Arm and MIPS platforms

Tuesday, October 31, 2017

• Global Semiconductor Industry Posts Highest-Ever Quarterly Sales

Tuesday, October 31, 2017

• Attopsemi Technology Published a Paper for the IEEE S3S Conference in October 16-19 2017, San Francisco

Monday, October 30, 2017

• Cadence Joules RTL Power Solution Enables Socionext to Accelerate Low-Power HEVC 4K/60p Video Codec Chip Development
• Truechip Announces First Customer Shipment Of USB 3.2 Verification IP
• Synopsys' DesignWare STAR Memory System's New Test and Repair Capabilities Speed Embedded Memory Repair Time by 10x
• Cadence Joules RTL Power Solution Enables Socionext to Accelerate Low-Power HEVC 4K/60p Video Codec Chip Development
• Flex Logix to Provide Embedded FPGA IP to 'DesignShare' for SiFive Freedom Platform
• X-factors Hobble iPhone X
• Samsung's Chip Sales Hit New High
• The limits and the security of Autopilot

Monday, October 30, 2017

• Cadence Reports Third Quarter 2017 Financial Results

Sunday, October 29, 2017

• China FPGA strategy takes shape
• Thoughts on Jem Davies leading Arm's machine learning group
• Global Semiconductor Industry Posts Highest-Ever Quarterly Sales
• Online BOM calculator simplifies costing process for IIoT custom ICs
• 19 Views of Arm Tech Con 2017
• OmniPHY to Demonstrate Automotive Design Solutions at IEEE-SA Automotive Ethernet Technology Day
• Synopsys Test Platform Tools Certified for the Most Stringent Level of Automotive Safety Measures Defined by the ISO 26262 Standard
• China FPGA strategy takes shape
• Green Hills adds to secure RTOS support for Xilinx Zynq
• Synopsys Introduces Complete Functional Safety Test Solution to Accelerate ISO 26262 Compliance for Automotive SoCs
• 32Kb Innovative Fuse (I-Fuse) Array in 22nm FD-SOI presented by Attopsemi at San Francisco
• HiSilicon采用DesignWare® Foundation IP实现7纳米 FinFET SoC一次流片成功

Saturday, October 28, 2017

• Arm launched platform security architecture PSA for the establishment of industry-wide framework for the trillions of interconnected devices

Thursday, October 26, 2017

• STMicro Sees Growth Across the Board
• Renesas Electronics and ASTC accelerate software development for smart cameras with R-Car V3M virtual platform
• IoT May Need Sub-50-Cent SoCs
• Custom Blocks -The Key Ingredients for Embedded FPGA Success, Achronix's Speedcore embedded FPGAs utilize custom blocks to deliver high-performance ASICs.
• Vidatronic Announces Flexsupply Family of Switched-Capacitor DC-DC Converter IP Cores

Thursday, October 26, 2017

• Arm Unveils New AI Group

Wednesday, October 25, 2017

• Dialog becomes the Xilinx management partner on SoC and FPGA-leading power
• UPDATE 1-China Everbright, VC firm Walden launch $500 mln semiconductor fund (165)
• Here's Why Taiwan Semiconductor Manufacturing Co. Ltd.'s 16-Nano Shipments Dropped
• Arm Unveils New AI Group
• Arm CEO Sounds Security Alarm
• Intel Enables 5G, NFV and Data Centers with High-Performance, High-Density Arm-based Intel Stratix 10 FPGA
• NetSpeed and UltraSoC partner to accelerate development time for complex SoCs

Tuesday, October 24, 2017

• Bitmain Introduces Its First Hardware for Accelerating Artificial Intelligence (AI) Applications
• PCI-SIG Releases PCIe 4.0, Version 1.0
• Global Unichip Achieves Critical ISO 13485:2016 Certification for Medical Device Components
• Bringing an additional layer of fortification to SoCs powering the next trillion connected devices
• Sonics And Moortec Partner To Provide Temperature-Compensated DVFS Capability For SoC And MCU Designers

Tuesday, October 24, 2017

• New ASIL-B Ready ISO 26262 Certified VESA DSC IP Cores Launched by Hardent

Monday, October 23, 2017

• Lauterbach and SiFive Bring TRACE32 Support for High-Performance RISC-V Cores
• BrainChip Ships First BrainChip Accelerator To a Major European Car Maker for Evaluation in ADAS and AV Systems
• UltraSoC appoints Alberto Sangiovanni-Vincentelli as Chairman
• PLDA GROUP Announces Divestiture of REFLEX CES, Enabling an Increased Focus on Its Core Activities and Investments in High Potential Business Segments
• Apple Talks About Sole Sourcing from TSMC
• HEVC Advance Announces Revised Royalty Rates for Lower-Priced Devices
• asicNorth announces immediate availability of its IoT Endpoint ASIC Platform
• New ASIL-B Ready ISO 26262 Certified VESA DSC IP Cores Launched by Hardent
• Flex Logix Demonstrates Flexible Microcontroller at Arm TechCon
• Cadence and Arm Deliver First SoC Verification Solution for Low-Power, High-Performance Arm-Based Servers
• Fast Processor Models of Latest Arm Cores Released by Imperas and Open Virtual Platforms (OVP)
• Andes 32-bit CPU IP Cores Implemented on GLOBALFOUNDRIES 22FDX Process Technology
• eMemory Unveils Auto-Grade EEPROM IP with over 500K Cycle Endurance

Monday, October 23, 2017

• It's Here: A Common Industry Framework for Protecting a Trillion Connected Devices

Monday, October 23, 2017

• TSMC Expects 10nm Demand to Soar

Monday, October 23, 2017

• SiFive Selects Synopsys Verification Continuum Platform for Advanced RISC-V Processor Designs

Sunday, October 22, 2017

• Silvaco Introduces Arm Cortex M0-based I3C Sensor Subsystem
• Guardtime and Intrinsic ID Awarded Dutch Government Contract for Distributed Energy Marketplace via a Decentralized Trading Platform
• Rambus Reports Third Quarter 2017 Financial Results
• Menta Joins GLOBALFOUNDRIES' FDXcelerator Partner Program
• TSMC head optimistic about future of semiconductor market
• 90% Reduction in power consumption for RFID chips with Dolphin Integration's SESAME eLC standard cell library
• Lowering Barriers to Entry for ASICs
• RAPID SOC PROOF-OF-CONCEPT FOR ZERO COST