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Friday, June 3, 2016

• Newracom Successfully Communicates with Wi-Fi HaLow, IEEE 802.11ah at a Distance Greater than 1 km

Thursday, June 2, 2016

• sureCore Delivers 40nmULP Memory Compiler

Thursday, June 2, 2016

• Spontey Rebrands as RealSilicon

Thursday, June 2, 2016

• Blue Pearl Software Visual Verification Suite 2016.2 Simplifies ASIC, FPGA and IP RTL Verification

Thursday, June 2, 2016

• Cosmic Circuits is attending TSMC Symposium in Israel on 27th June 2011

Thursday, June 2, 2016

• Cosmic Circuits is attending TSMC Symposium in Tel Aviv, Israel on 25th June 2012

Thursday, June 2, 2016

• Innotech represents Cosmic Circuits in TSMC Symposium in Yokohama, Japan on 29th June 2012

Wednesday, June 1, 2016

• Silvaco Group Acquires edXact for SPICE Simulation Speed-up
• Hitachi Adopts Cadence AMS Model-Based Methodology and Tools for Mixed-Signal Design Verification
• Synopsys' SpyGlass Solution Delivers Critical Technology to Enable Compliance with DO-254 Aviation Safety Standard
• Arm Expands Cycle Model Portfolio with Support for SystemC
• Comcores Announce Availability of a 10G TSN Ethernet MAC solution
• True Circuits Attends Design Automation Conference Showcases State-of-the-art Ultra PLL, Low Power IoT PLL and Revolutionary DDR 4/3 PHY

Wednesday, June 1, 2016

• Andes Technology Corporation Announces Most Advanced Embedded Security Based on Physical Unclonable Functions From Intrinsic-ID Inc. for Its Secure CPU/MCU Cores

Wednesday, June 1, 2016

• Allegro DVT to Highlight Latest Multi-Format Video Codec Hardware IPs at Upcoming DAC 2016.

Wednesday, June 1, 2016

• Innovium and Broadcom Settle Legal Dispute

Tuesday, May 31, 2016

• Allegro DVT to Highlight Latest Multi-Format Video Codec Hardware IPs at Upcoming DAC 2016
• Xiaomi Buys 1,500 Microsoft Patents, Eyes Global Expansion
• NetSpeed and Magillem partner to enable seamless IP integration of cache coherent NoC IP
• FDSOI grabs European money for IoT
• SureCore SRAM IP runs at 20MHz on 0.6V
• New FPGA/SoC TFT LCD Display Controller IP Core
• Boost Valley Announces V-by-One HS Verification IP
• Andes Technology Corporation Announces Most Advanced Embedded Security Based on Physical Unclonable Functions From Intrinsic-ID Inc. for Its Secure CPU/MCU Cores
• sureCore 40nm Ultra-Low Voltage SRAM Proves World Beating Low Voltage Operation in Silicon
• Synopsys' Next-Generation Embedded Vision Processors Boost Performance up to 100X

Tuesday, May 31, 2016

• Toshiba Announces Immediate IP Subsystem Availability of PCI Express and DDR3 for Custom LSI Platforms

Tuesday, May 31, 2016

• Heterogeneous Systems Architecture Foundation Launches HSA 1.1 Specification with Multi-Vendor Architecture Support

Tuesday, May 31, 2016

• IEEE Standards Association Announces IEEE 802.3 Projects to Meet Industry Demands for Higher Ethernet Speeds

Tuesday, May 31, 2016

• Marvell Releases New ARMADA Hyperscale Virtual SoC Families Featuring the ARM Cortex-A72 CPU with Advanced Networking and I/O Support

Tuesday, May 31, 2016

• Despite Economic Headwinds in China, Industrial Semiconductor Revenues Rose in 2015, IHS Says

Tuesday, May 31, 2016

• Arteris FlexNoC IP and FlexNoC Resilience Package Licensed by Dream Chip Technologies for ADAS SoC

Tuesday, May 31, 2016

• Fast Processor Model of Renesas RL78 CPU Released by Imperas for Open Virtual Platforms

Tuesday, May 31, 2016

• GLOBALFOUNDRIES to Expand Presence in China with 300mm Fab in Chongqing

Tuesday, May 31, 2016

• Inuitive Selects CEVA-XM4 Intelligent Vision DSP for Next Generation 3D Computer Vision SoC

Tuesday, May 31, 2016

• Barco Silex at InfoComm, demonstrating professional OEM boards for HDMI transport over IP

Tuesday, May 31, 2016

• Cavium Announces ThunderX2, the second generation of workload optimized ARM server SoCs

Monday, May 30, 2016

• Long-term Strategy Pays Off As TI Maintains Analog Leadership
• GloFo to equip 300mm fab in China
• China Moves in Takeover of European Wafer Supplie
• Innovium secures more than $50M in funding
• Industrial IoT starts to make real-world progress
• Avnet ASIC Israel Ltd. (AAI) Standardizes on Synopsys' Design Compiler Graphical to Accelerate SoC Design Cycle
• Cadence Next-Generation Virtuoso Platform Deployed by STMicroelectronics for SmartPower Technologies
• Arm's Bifrost Steps Up Graphics, Bridges to Machine Learning
• HSA spec upgrade supports multivendor SoCs
• Latest Arm Premium Mobile Technology to Drive Immersive Experiences
• Design Verification Challenges in Modern SoCs - HDL Design House Webinar
• Chips&Media unveils its first Image Signal Processing (ISP) IP solution

Monday, May 30, 2016

• France Brevets licenses NFC Patents to Samsung

Monday, May 30, 2016

• Digital Blocks DB9000 TFT LCD Display Controller IP Core Family Achieves Leadership Across Medical, Industrial, Aerospace, Automotive, Communications, Computer, Monitor, Consumer, IoT, Wearables, and Cinema Applications

Sunday, May 29, 2016

• Imagination joins the TRON Forum in Open IoT Platform initiative
• Development kit targets industrial IoT
• Arm takes VR/AR mobile with GPU core
• Arm aims Artemis at low power
• INSIDE Secure and Rambus Collaborate to Protect Delivery of 4K and Ultra HD Premium Content

Saturday, May 28, 2016

• Cadence Delivers Rapid Adoption Kits Based on a 10nm Reference Flow for New Arm Cortex-A73 CPU and Arm Mali-G71 GPU
• Early Adopters of Arm Cortex-A73 CPU and Mali-G71 GPU Successfully Tape-out Using Synopsys' IC Compiler II

Friday, May 27, 2016

• Digital Blocks DB9000 TFT LCD Display Controller IP Core Family Achieves Leadership cross a wide range of applications

Thursday, May 26, 2016

• FDSOI Driving ST's Automotive Biz

Thursday, May 26, 2016

• Silicon Creations Taps Silvaco's Custom Design Flow for 10nm FinFET Designs

Thursday, May 26, 2016

• Faraday Exhibits 28HPCU SoC Design Service and IP Solutions at DAC 2016

Thursday, May 26, 2016

• Communications and Computer Systems Drive IC Sales Across All Regions

Thursday, May 26, 2016

• Gartner Identifies Think Silicon a "Cool Vendor" in Novel Semiconductors for Neural Networks

Wednesday, May 25, 2016

• Faraday Exhibits 28HPCU SoC Design Service and IP Solutions at DAC 2016
• 10 design steps to IoT heaven
• Four MIPS-based connected devices for the IoT revolution
• Xilinx adds FPGA acceleration for new data-centre content-transfer framework
• PLDA Achieves PCI Express 3.0 Compliance for XpressSWITCH IP, Adding to its List of PCI Express Compliant Products

Wednesday, May 25, 2016

• Rambus Chief Financial Officer Satish Rishi to Retire in August

Wednesday, May 25, 2016

• North American Semiconductor Equipment Industry Posts April 2016 Book-to-Bill Ratio of 1.10

Wednesday, May 25, 2016

• Agnisys and Breker Partner to Generate System-Level Portable Stimulus Sequences

Wednesday, May 25, 2016

• Imec and Holst Centre Present Multi-Standard Low-Power Wide-Area Radio Chip

Tuesday, May 24, 2016

• IoT Security is Imec Target
• Arteris Ncore Cache Coherent Interconnect IP Enabled by Arm's Cycle Models
• Globalfoundries Working on Next-Gen FDSOI Process
• Optimised cryptographic solution for home automation on Cortus APS3RP core
• Imec, Holst Centre and Barco Silex Collaborate on Data Security for Wearables and Internet of Things Networks
• Synopsys Accelerates Software Development for Automotive Systems with New Models for Bosch Timer and In-Car Communication IP

Tuesday, May 24, 2016

• ARM Cortex-A72 Models and Virtual Platforms Released by Imperas and Open Virtual Platforms

Tuesday, May 24, 2016

• Analogix Licenses USB-C Technology to LG Electronics

Tuesday, May 24, 2016

• Synopsys Delivers Industry's First Cache Coherent Subsystem Verification Solution for Arteris Ncore Interconnect

Tuesday, May 24, 2016

• Innosilicon Announces that the world 1st 14nm A4 Dominator ASIC is ready for mass shipment in 2 months

Tuesday, May 24, 2016

• Synopsys Completes Acquisition of Gold Standard Simulations

Tuesday, May 24, 2016

• Arteris Ncore Cache Coherent Interconnect IP is Implemented by NXP

Monday, May 23, 2016

• FPGA Manager IP eases data streaming
• Arm Cortex-A72 Models and Virtual Platforms Released by Imperas and Open Virtual Platforms
• Alizem releases new Safe Engine Stop-Start Software IP to improve energy-efficiency of delivery vehicles
• Agnisys Expands Product Portfolio With Portable Sequence Generator
• Synopsys Completes Acquisition of Gold Standard Simulations
• Innosilicon Announces that the world 1st 14nm A4 Dominator ASIC is ready for mass shipment in 2 months
• Agnisys and Breker Partner to Generate System-Level Portable Stimulus Sequences
• Synopsys Delivers Industry's First Cache Coherent Subsystem Verification Solution for Arteris Ncore Interconnect
• Analogix Licenses USB-C Technology to LG Electronics
• Arteris Ncore Cache Coherent Interconnect IP is Implemented by NXP

Monday, May 23, 2016

• Semifore and Breker Partner to Deliver Seamless, Automated Portable Stimulus Flow

Monday, May 23, 2016

• Synopsys Expands Software Integrity Strategy to Enable Development of Safer and More Secure Automotive Software

Monday, May 23, 2016

• Semiconductor Merger Mania: A Change From Historical Norms?

Sunday, May 22, 2016

• Tower Debuts RF Process For IoT Front Ends
• Foundries' Sales Show Hard Times Continuing
• Synopsys Launches Pre-Wafer Simulation Solution to Reduce Semiconductor Process Development Time
• Synopsys Expands Software Integrity Strategy to Enable Development of Safer and More Secure Automotive Software
• AMPHION targets DAC 2016 to demonstrate compact HEVC/H.265 hardware decoder IP using H.265 bitstreams from encoder IP innovator NGCodec
• Xilinx Expands its 16nm UltraScale+ Product Roadmap to Include Acceleration Enhanced Technologies for the Data Center
• Technology Leaders Join Forces to Bring an Open Acceleration Framework to Data Centers and Other Markets
• GLOBALFOUNDRIES Releases Performance-Enhanced 130nm SiGe RF Technology to Advance Next Generation Wireless Network Communications
• eMemory NeoFuse IP Qualified in 40nm EHV Process
• Palma Ceia SemiDesign Tapes Out 802.11ax Analog Frontend for Next-Generation Access Points