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Wednesday, May 25, 2016

• Faraday Exhibits 28HPCU SoC Design Service and IP Solutions at DAC 2016
• 10 design steps to IoT heaven
• Four MIPS-based connected devices for the IoT revolution
• Xilinx adds FPGA acceleration for new data-centre content-transfer framework
• PLDA Achieves PCI Express 3.0 Compliance for XpressSWITCH IP, Adding to its List of PCI Express Compliant Products

Wednesday, May 25, 2016

• Rambus Chief Financial Officer Satish Rishi to Retire in August

Wednesday, May 25, 2016

• North American Semiconductor Equipment Industry Posts April 2016 Book-to-Bill Ratio of 1.10

Wednesday, May 25, 2016

• Agnisys and Breker Partner to Generate System-Level Portable Stimulus Sequences

Wednesday, May 25, 2016

• Imec and Holst Centre Present Multi-Standard Low-Power Wide-Area Radio Chip

Tuesday, May 24, 2016

• IoT Security is Imec Target
• Arteris Ncore Cache Coherent Interconnect IP Enabled by Arm's Cycle Models
• Globalfoundries Working on Next-Gen FDSOI Process
• Optimised cryptographic solution for home automation on Cortus APS3RP core
• Imec, Holst Centre and Barco Silex Collaborate on Data Security for Wearables and Internet of Things Networks
• Synopsys Accelerates Software Development for Automotive Systems with New Models for Bosch Timer and In-Car Communication IP

Tuesday, May 24, 2016

• ARM Cortex-A72 Models and Virtual Platforms Released by Imperas and Open Virtual Platforms

Tuesday, May 24, 2016

• Analogix Licenses USB-C Technology to LG Electronics

Tuesday, May 24, 2016

• Synopsys Delivers Industry's First Cache Coherent Subsystem Verification Solution for Arteris Ncore Interconnect

Tuesday, May 24, 2016

• Innosilicon Announces that the world 1st 14nm A4 Dominator ASIC is ready for mass shipment in 2 months

Tuesday, May 24, 2016

• Synopsys Completes Acquisition of Gold Standard Simulations

Tuesday, May 24, 2016

• Arteris Ncore Cache Coherent Interconnect IP is Implemented by NXP

Monday, May 23, 2016

• FPGA Manager IP eases data streaming
• Arm Cortex-A72 Models and Virtual Platforms Released by Imperas and Open Virtual Platforms
• Alizem releases new Safe Engine Stop-Start Software IP to improve energy-efficiency of delivery vehicles
• Agnisys Expands Product Portfolio With Portable Sequence Generator
• Synopsys Completes Acquisition of Gold Standard Simulations
• Innosilicon Announces that the world 1st 14nm A4 Dominator ASIC is ready for mass shipment in 2 months
• Agnisys and Breker Partner to Generate System-Level Portable Stimulus Sequences
• Synopsys Delivers Industry's First Cache Coherent Subsystem Verification Solution for Arteris Ncore Interconnect
• Analogix Licenses USB-C Technology to LG Electronics
• Arteris Ncore Cache Coherent Interconnect IP is Implemented by NXP

Monday, May 23, 2016

• Semifore and Breker Partner to Deliver Seamless, Automated Portable Stimulus Flow

Monday, May 23, 2016

• Synopsys Expands Software Integrity Strategy to Enable Development of Safer and More Secure Automotive Software

Monday, May 23, 2016

• Semiconductor Merger Mania: A Change From Historical Norms?

Sunday, May 22, 2016

• Tower Debuts RF Process For IoT Front Ends
• Foundries' Sales Show Hard Times Continuing
• Synopsys Launches Pre-Wafer Simulation Solution to Reduce Semiconductor Process Development Time
• Synopsys Expands Software Integrity Strategy to Enable Development of Safer and More Secure Automotive Software
• AMPHION targets DAC 2016 to demonstrate compact HEVC/H.265 hardware decoder IP using H.265 bitstreams from encoder IP innovator NGCodec
• Xilinx Expands its 16nm UltraScale+ Product Roadmap to Include Acceleration Enhanced Technologies for the Data Center
• Technology Leaders Join Forces to Bring an Open Acceleration Framework to Data Centers and Other Markets
• GLOBALFOUNDRIES Releases Performance-Enhanced 130nm SiGe RF Technology to Advance Next Generation Wireless Network Communications
• eMemory NeoFuse IP Qualified in 40nm EHV Process
• Palma Ceia SemiDesign Tapes Out 802.11ax Analog Frontend for Next-Generation Access Points

Thursday, May 19, 2016

• ARM Drives the Future of Premium Mobile Computing with a Multicore Test Chip based on 10FinFET from TSMC

Thursday, May 19, 2016

• Synopsys' Custom Compiler Enabled for Samsung Foundry's 14-nm FinFET Process

Thursday, May 19, 2016

• Imagination accelerates Debian development for 64-bit MIPS CPUs

Thursday, May 19, 2016

• Sivers IMA signs agreement with Blu Wireless Technology

Wednesday, May 18, 2016

• ANSYS Introduces First Big Data and Machine Learning System for Engineering Simulation
• Microsemi Announces RTG4 PROTO FPGAs to Enable Lower Cost Prototyping and Design Validation for High-Speed Radiation-Tolerant FPGAs
• INSIDE Secure to sell its semiconductor business to Swiss cybersecurity expert WISeKey
• Fujitsu and BAE Systems enter into a cybersecurity partnership
• Intel selects Mercury Systems to join FPGA tech-based network

Wednesday, May 18, 2016

• M31 Technology Develops a Complete Set of New-Generation High-Performance USB IP solutions

Tuesday, May 17, 2016

• 円星科技完整佈局新一代高效能USB矽智財解決方案
• Experts find IoT security lacking
• Nokia's brand goes to startup with $500M plan
• Security startups strive on IoT, attract venture capital
• CEA expands collaboration with Intel in wireless and IoT
• Arm multi-core v8 test chip fabbed on TSMC 10nm finfet process
• Imagination goes with Debian OS for MIPS64 processors
• Mobileye, ST to develop autonomous driving SoC
• Arm Acquires Apical - a Global Leader in Imaging and Embedded Computer Vision

Tuesday, May 17, 2016

• Xilinx Appoints Saar Gillai, Ron Jankov, and Tom Lee to its Board of Directors

Tuesday, May 17, 2016

• Toshiba Expands Synopsys IC Compiler II Usage Across Groups to Shorten Design Cycle

Monday, May 16, 2016

• UltraSOC refines tool suite
• Arteris Redefines Heterogeneous Multicore Cache Coherency with Configurable, Distributed Semiconductor Architecture
• The World's Best Multiplexer
• S2C Shares Expert FPGA Prototyping Knowledge at 2016 Design Automation Conference
• Synopsys Completes Acquisition of Simpleware
• Xentech Solutions Ltd selects Achronix Speedster22i FPGAs for its Axtrinet Ethernet Packet Generators
• Toshiba Expands Synopsys IC Compiler II Usage Across Groups to Shorten Design Cycle
• Aldec Extends Spectrum of Verification Tools for Use in Digital ASIC Designs
• Latest Synopsys IC Compiler II Release Boosts Quality-of-Results for Performance-Critical Designs
• New Layers Form within the Cloud

Monday, May 16, 2016

• Lattice Announces First Programmable ASSP (pASSP) Interface Bridge for Mobile Image Sensors and Displays

Monday, May 16, 2016

• Five Months into the Year and Market Finally Reaching Bottom; IDC Forecasts Worldwide Semiconductor Revenue Still to Fall 2.3% to $324 Billion

Monday, May 16, 2016

• UltraSoC announces significant product update, improved support for analytics and "any CPU" capability

Sunday, May 15, 2016

• Uurmi Fog Removal Software Now Available on Cadence Tensilica Vision DSPs
• Xilinx Board Of Directors Increases Repurchase Authorization By $1 Billion
• Lattice bridge IC brings mobile display interfaces to industrial apps
• NEWRACOM to exhibit top-notch Wi-Fi and Bluetooth technologies for mobile, IoT, and M2M connected consumer devices at COMPUTEX 2016 and DAC 2016
• First Quarter 2016 Silicon Wafer Shipments Increase Quarter-Over-Quarter
• Truechip announces first customer shipment of CPRI Comprehensive Verification IP (CVIP)

Friday, May 13, 2016

• Seven Top-20 1Q16 Semiconductor Suppliers Show Double-Digit Declines

Friday, May 13, 2016

• Open-Silicon CEO: Creating a legacy through traditional values