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Friday, March 20, 2026

• ASIC North achieves AS 9100D and ISO 9001:2015 certifications

Thursday, March 19, 2026

• Infineon executive urges Europe to build larger, automated fabs
• Taiwan’s Emerging Power Electronics Strategy in the AI Era
• STMicroelectronics accelerates global adoption and market growth of Physical AI with NVIDIA
• Nordic Semiconductor launches flat-rate FOTA solution, readying customers for Cyber Resilience Act
• STMicroelectronics expands 800 VDC AI datacenter power conversion portfolio with new 12V and 6V architectures in collaboration with NVIDIA
• Synopsys Showcases NVIDIA Partnership Impact and Ecosystem Innovation at GTC 2026
• Mythic® Selects memBrain™ Technology from Silicon Storage Technology® for its Next Generation of Ultra-Low-Power Analog Processing Units
• Cadence and NVIDIA Unveil Accelerated Engineering Solutions Purpose-Built for Agentic AI Chip and System Design​
• MIPS and Green Hills Software Accelerate Safety Certified Product Development for MIPS RISC-V Microcontrollers
• Tenstorrent QuietBox 2 Brings RISC‑V AI Inference to the Desktop
• Memory Moves: Upgrades to HBM4, eMMC, LPDDR5X, & MRAM Across Industries
• Keysight Launches AI Inference Emulation Platform to Validate and Optimize AI Infrastructure
• Synopsys Outlines Vision for Engineering the Future

Wednesday, March 18, 2026

• The Future of Semiconductors: A Deep Dive with Tomi-Pekka Takalo

Tuesday, March 17, 2026

• Siemens launches Fuse EDA AI Agent for automation across semiconductor, 3D IC and PCB system workflows

Monday, March 16, 2026

• Chip Foundry TSMC Says Its Sales Rose 22% In February
• Soitec and NSIG to agree extension of licensing framework
• Reshaping the technology landscape in Europe
• SEMIFIVE Signs Turnkey Design Contract Worth KRW 18,000 Million With AI Semiconductor Fabless Company
• GlobalFoundries Announces Pricing of Public Secondary Offering and Concurrent Share Repurchase
• Silvaco Reports Fourth Quarter and Full-Year 2025 Financial Results
• Credo Acquires CoMira Solutions
• Keysight Introduces New 224G Test Solutions to Enable 1.6T Optical Network Validation
• Ceva’s NeuPro-Nano NPU Wins Artificial Intelligence Award at embedded world 2026
• BrainChip Enables the Next Generation of Always-On Wearables with the AkidaTag© Reference Platform
• Klepsydra Technologies and BrainChip Announce Strategic Partnership to Deliver Heterogeneous AI Runtime for Akida™ Neuromorphic Processors
• Faster and more energy-efficient electronics with 3D chip design
• AI Chip Design From Heilbronn
• IBM, Lam Research Focus High-NA EUV on Sub-1-nm Nodes

Friday, March 13, 2026

• RISC-V TDS350N IP Core: A55-Class Performance, AI Acceleration processor for AI and ML Scenarios

Thursday, March 12, 2026

• TES Unveils High-Performance 8/40MHz Oscillator and Clock Buffer IPs for Reliable On-Chip Timing Solutions for X-FAB XT018 - 0.18µm BCD-on-SOI technology.
• Soitec Secures Multi- Year Agreement to Supply POI Wafers for Skyworks’ Sky5 Platform
• BOS Semiconductors’ AI Semiconductor Design Technology for Future Mobility Recognized as National Strategic Technology
• Movellus Advanced Clocking IP Selected for QuickLogic’s Strategic Radiation Hardened FPGA Program
• GlobalFoundries Announces Availability of AutoPro150 eMRAM Technology on Enhanced FDX Platform for Advanced Automotive Applications
• CEA-Leti and NcodiN Partner to Industrialize 300 mm Silicon Photonics for Bandwidth-Hungry AI Interconnects
• Hexagon Semi’s HX77 AR Display Processor Achieves Ultra-Low Power Consumption with VeriSilicon’s Nano IP Portfolio
• Allegro DVT Launches DWP300 DeWarp Semiconductor IP
• A CHERI on Top: A Better Way to Build Embedded Secure SoCs
• Keysight Debuts Purpose-Built 1.6T Ethernet AI Workload Emulation Platform to Validate Next-Generation AI Fabrics
• Axelera® AI Adds Kudelski Labs’ Security IP to Europa® Chip to Enable Secure, High-Performance Edge AI
• Synopsys Launches Electronics Digital Twin Platform to Accelerate Physical AI System Development
• Samsung to Make Ubitium’s Universal RISC-V Processor
• Samsung Applies 2nm Process to HBM Memory
• Movellus Partners with Synopsys to Deliver Power Efficiency for Next Generation IC’s
• CAST Debuts TSN-EP-10G IP for High-Performance, Time-Sensitive Networking Ethernet Designs
• Synopsys Launches Electronics Digital Twin Platform to Accelerate Physical AI System Development
• Silvaco Announces Immediate Availability of Production Ready Mixel MIPI PHY IP, Strengthening its Comprehensive Silicon IP Offering

Tuesday, March 10, 2026

• Ceva Launches Next-Generation UWB IP with Extended Range and Higher Throughput
• EnSilica plc - New Contract Wins and Programme Upgrades
• CAST Introduces 400 Gbps UDP/IP Hardware Stack IP Core for High-Performance ASIC Designs
• Microservice Store Launches the IoT Transparency Portal: Transparent view of SBOM, and live vulnerability status.

Monday, March 9, 2026

• CAST Demonstrates IP Cores for Leading-Edge Technologies at Embedded World 2026
• Axelera Raises $250M in Largest EU Semi Round Ever
• Nvidia and Lumentum form $2bn AI optics partnership
• STMicroelectronics enters high-volume production of its industry-leading silicon photonics platform to support AI infrastructure demand
• Nvidia Advances AI-Native Strategy at MWC
• Is Your IoT Strategy Ready for the New Landscape?
• Nordic Semiconductor Expands Cellular IoT Portfolio
• Keysight Demonstrates 5G-Advanced AI-Powered Channel State Information Compression and Paves the Way for 6G
• STMicroelectronics’ new STM32 series redefines entry-level microcontroller performance and value for smart devices everywhere
• The path to RISC-V growth: Why software consistency is becoming crucial
• Linaro, Arm Launch CoreCollective Open Consortium
• Global 2nm Supply Crunch: TSMC Leads as Intel 18A, Samsung, and Rapidus
• Rapidus to Make Chips for Canon, Synopsys on Trial
• Intel CEO embraces its 18A node for external customers as 18A-P gets 'inbound interest' — company cites increasing yields