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Friday, May 3, 2024

• Arm Brings Transformers to IoT Devices

Thursday, May 2, 2024

• Alphawave Semi announced today a refocussing of the Board of Directors after reaching the three-year milestone since the Company's IPO
• Synopsys and Samsung Electronics Collaborate to Achieve First Production Tapeout of Flagship Mobile CPU with Leading Performance on Samsung Foundry's GAA Process

Wednesday, May 1, 2024

• Intel aims to produce scalable silicon-based quantum processors
• Radiation-Tolerant PolarFire® SoC FPGAs Offer Low Power, Zero Configuration Upsets, RISC-V Architecture for Space Applications
• GOWIN's progress in global automotive market gathers momentum with award of ISO 26262 certification for its FPGA design environment
• Worldwide Silicon Wafer Shipments Dip 5% in Q1 2024, SEMI Reports
• Radiation-Tolerant PolarFire® SoC FPGAs Offer Low Power, Zero Configuration Upsets, RISC-V Architecture for Space Applications
• PCI-SIG® Announces CopprLink™ Cable Specifications for PCIe® 5.0 and 6.0 Technology

Tuesday, April 30, 2024

• Synopsys 3DIO Solution for Multi-Die Integration (2.5D/3D)
• The End of an Era: Zilog Discontinues the Z80 Microprocessor
• Radiation-Tolerant RISC-V FPGA for Linux in space
• Rapid Silicon Introduces Revolutionary Rapid eFPGA Configurator for Hassle Free Embedded FPGA Evaluation
• QuickLogic Releases Aurora 2.6 with Expanded Operating System Support and Up to 15% Faster Performance
• Packetcraft Delivers Bluetooth Software Enabling Channel Sounding to Early Access Licensees

Monday, April 29, 2024

• Samsung Q1 profit up 10x
• Synopsys Introduces Polaris Assist: AI-Powered Application Security Assistant
• TSMC Certifies Ansys Multiphysics Platforms, Enabling Next-Gen AI and HPC Chips
• Silvaco Announces Launch of Initial Public Offering

Sunday, April 28, 2024

• Rambus Reports First Quarter 2024 Financial Results
• STMicroelectronics hits 71% renewable electricity, targets 100% by 2027
• Rambus Expands Chipset for Advanced Data Center Memory Modules with DDR5 Server PMICs
• Siemens' tools certified for TSMC N2
• Arm China's ex-CEO sets up RISC-V company
• EDA toolset parade at TSMC's U.S. design symposium
• TSMC's A16 Process Moves Goalposts in Tech-Leadership Game
• Altera in negotiation on private equity partner
• CAN FD Controller & LIN 2.1 Controller IP Cores, Available for Immediate Licensing with Proven Automotive Compatibility

Thursday, April 25, 2024

• Automotive Cybersecurity: A Review of 2023
• TSMC plans 1.6nm process for 2026
• Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
• Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%

Wednesday, April 24, 2024

• TSMC unveils 1.6nm process technology with backside power delivery, rivals Intel's competing design
• TSMC unveils 1.6nm process technology with backside power delivery, rivals Intel's competing design
• M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
• Cadence and TSMC Collaborate on Wide-Ranging Innovations to Transform System and Semiconductor Design
• Numem at the Design & Reuse IP SoC Silicon Valley 2024
• TSMC Celebrates 30th North America Technology Symposium with Innovations Powering AI with Silicon Leadership
• Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
• Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development

Tuesday, April 23, 2024

• Industry's First General-Purpose 32-bit RISC-V MCU Core Expands Design Freedom
• Keysight, Synopsys, and Ansys Deliver Radio Frequency Design Migration Flow to TSMC's N6RF+ Process Node
• Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
• Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
• Leveraging Cryogenics and Photonics for Quantum Computing
• Credo at TSMC 2024 North America Technology Symposium
• Rambus Advances AI 2.0 with GDDR7 Memory Controller IP

Monday, April 22, 2024

• Efabless Announces the Launch of the Tiny ML on Tiny Tapeout Contest
• Siemens and Mercedes-Benz Transform Future of Sustainable Factory Planning with Digital Energy Twin
• Fundamental inventions enable the best ppa and most portable eFPGA/DSP/SDR/AI IP for adaptable SOCs
• Cadence Reports First Quarter 2024 Financial Results
• RAAAM Memory Technologies Closes $4M Seed Round to Commercialize Super Cost Effective On-Chip Memory Solutions
• Faraday Reports First Quarter 2024 Results
• Alphawave Semi Audited Results for the Year Ended 31 December 2023
• Qualitas Semiconductor Appoints HSRP as its Distributor for the China Markets
• Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
• Analog Bits to Demonstrate Numerous Test Chips Including Portfolio of Power Management and Embedded Clocking and High Accuracy Sensor IP in TSMC N3P Process at TSMC 2024 North America Technology Symposium