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Tuesday, January 16, 2024

• Andes Announces General Availability of the New RISC-V Out-Of-Order Superscalar Multicore Processor, the AndesCoreâ„¢ AX65

Monday, January 15, 2024

• Video: Leveraging the RISC-V efficient trace (E-Trace) standard
• proteanTecs Launches Power Reduction Solution for High Performance Markets
• Gartner Says Worldwide Semiconductor Revenue Declined 11% in 2023
• Synopsys to Acquire Ansys, Creating a Leader in Silicon to Systems Design Solutions
• Chiplet Makers Expect to Disrupt Incumbents
• MIPS Aims to Give Back Control, for AI-Centric Compute

Sunday, January 14, 2024

• Media Alert: Rambus to Announce Fourth Quarter and Fiscal Year 2023 Results
• Cadence Wins TCSA Top 10 Foreign Sustainable Model Companies Award
• Are Low Carbon Nanomaterials the Key to a Greener Tomorrow?
• Davos: HCLTech CSO Jayaram on Need for Sustainability Speed
• High-bandwidth memory (HBM) options for demanding compute
• Unveiling Sonata: Affordable CHERI Hardware for Embedded Systems
• Crypto Quantique and iMQ to enable quantum secure chip-to-cloud connection
• EnSilica adds Post Quantum Cryptography support to eSi-Crypto IP library
• EdgeCortix Expands Leadership Team with Semiconductor Industry Veteran Tim Vehling as Executive Vice President of Global Sales
• Digital Blocks AMBA Multi-Channel DMA Controller IP Core Family Extends Leadership with releases for core DMA Engines in RISC-V® & ARM® Systems and Peripherals to Memory Applications
• Unveiling a Cutting-Edge 12-bit 5Msps SAR ADC IP Core - Industry-Leading Features, Silicon Proven, and Available for Licensing Now
• Digital Blocks AMBA Multi-Channel DMA Controller IP Core Family Extends Leadership with releases for core DMA Engines in RISC-V® & ARM® Systems and Peripherals to Memory Applications

Saturday, January 13, 2024

• Google to Samsung: Circular Tech Strategies Unveiled at CES

Friday, January 12, 2024

• Chip wars: How 'chiplets' are emerging as a core part of China's tech strategy

Friday, January 12, 2024

• Andes Technology and Spacetouch Collaborate to Unveil High-Tech Edge-Side AI Audio Processor Featuring the Powerful RISC-V AndesCoreâ„¢ D25F

Thursday, January 11, 2024

• An Open Platform for Software-Defined Vehicles: Expectations vs. Reality
• Edge-side AI audio processor now features RISC-V AndesCore D25F
• [CES 2024] Samsung to continue investing in HBM in 2025
• Crypto Quantique joint venture with iMQ Technology to enable Quantum Secure Chip-to-cloud Connection

Wednesday, January 10, 2024

• EU quantum researchers set to give up IP rights in standard-setting race
• Crypto Quantique partners with Blaitek to enable quantum secure chip-to-cloud connection
• Digital Core Design Presents D68000-CPU32+ for well-known 68k family

Tuesday, January 9, 2024

• NFC Forum Supports Emerging Regulatory Requirements for Sustainable Product Development
• Crypto Quantique and iMQ to enable quantum secure ship-to-cloud connection
• Intel buys Silicon Mobility alongside automotive chiplet push
• Intel, Samsung, TSMC 'Getting Serious' About CFET
• SCALINX, Leading Fabless Semiconductor in System-on-a-Chip Design, Secures €34 Million in Second Round Funding
• Ceva and Actions Technology Commemorate Landmark Achievement, Surpassing 100 Million Ceva-Powered Wireless Audio and AIoT Processors Shipped
• intoPIX Showcases Groundbreaking Sensorand Video Compression Technologies at CES 2024
• Sunplus and Ceva Expand Collaboration to Bring Bluetooth Audio to the airlyra SoC Family for Wireless Speakers, Soundbars and other Wireless Audio Devices
• GUC Tapes Out Complex 3D Stacked Die Design on Advanced FinFET Node Using Cadence Integrity 3D-IC Platform
• CXL Overcomes Hierarchical Routing Limits
• SCALINX, Leading Fabless Semiconductor in System-on-a-Chip Design, Secures €34 Million in Second Round Funding
• TSMC December 2023 Revenue Report
• Global Semiconductor Sales Increase 5.3% Year-to-Year in November
• Packetcraft and Synopsys Collaborate to Deliver Turnkey Bluetooth Qualified 5.4 PAwR and LE Audio Solutions
• CEO interview: MIPS' Sameer Wasson on a RISC-V reboot
• Atmosic Introduces the Multiprotocol ATM34/e Series Adding 802.15.4 Support for Thread and Matter to its Bluetooth LE Portfolio

Monday, January 8, 2024

• GlobalFoundries and Keppel sign Multi-Year Power Purchase Agreement
• Andes Technology and Spacetouch Collaborate to Unveil High-Tech Edge-Side AI Audio Processor Featuring the Powerful RISC-V AndesCore™ D25F
• Thalia's AMALIA qualified on 12nm FinFET technology
• VeriSilicon extends watch GUI ecosystem in partnership with QDay Technology for enhanced user experience
• GUC Taped Out UCIe 32G IP using TSMC's 3nm and CoWoS Technology
• Semiconductor Market: Rebound Expected in 2024, But Challenges Lie Ahead
• Ceva and THX Ltd. Partner to Bring Premium Spatial Audio to Hearables, Consumer and Mobile Products
• MIPS Launches New Corporate Brand At CES 2024
• Comcores JESD204D IP core conforming to the Revision D of the JESD204 standard released in Dec'2023 now available
• Valens Semiconductor and Intel Foundry Services Announce Strategic Relationship for Next Generation A-PHY Product
• VeriSilicon's 2nd generation automotive ISP series IP passed ISO 26262 ASIL B and ASIL D certifications

Sunday, January 7, 2024

• CES 2024: Siemens delivers innovations in immersive engineering and artificial intelligence to enable the industrial metaverse
• China Is All In on a RISC-V Future
• BrainChip and NVISO Group Demonstrate AI-Enabled Human Behavioral Analysis at CES 2024
• Comcores JESD204D IP core confirming to the Revision D of the JESD204 standard released in Dec'2023 now available
• Ceva and India's No. 1 Audio and Wearable Brand, boAt, Announce Strategic Partnership to Enhance the Wireless Audio Experience
• Electronic System Design Industry Posts Record $4.7 Billion in Revenue in Q3 2023, ESD Alliance Reports
• Ceva Expands AI Ecosystem for its Class-Leading NPU IP with New Partnerships for Automotive and Edge AI
• VeriSilicon unveils the new VC9800 IP for next generation data centers
• Creonic GmbH Joins the Science and Innovation Alliance Kaiserslautern
• Cadence Acquires Invecas to Accelerate System Realization
• OPENEDGES Achieves ISO9001: 2015 Certification, Proving IP Quality for its Customers
• DisplayPort v1.4 Tx PHY and Controller IP Cores which is Silicon proven in 12nm technology and also production proven is available for Worldwide instant licensing
• The SHD Group Has Released a Complimentary Version of the 2024 RISC-V Market Analysis Report Containing Current Market Data and Future Projections

Thursday, January 4, 2024

• Sustainability is the future for industry
• Omni Design Technologies Unveils Next-Gen LiDAR Solutions with Swiftâ„¢ Data Converters
• Socionext to Showcase Leading-Edge Technologies at CES 2024, Featuring Custom SoC Solutions, Low Power Sensors, Smart Display Controller, and Advanced Image Processor
• Omni Design Technologies Unveils Next-Gen LiDAR Solutions with Swift? Data Converters
• GUC Monthly Sales Report - December 2023
• Andes Announces General Availability of the New RISC-V Out-Of-Order Superscalar Multicore Processor, the AndesCore™ AX65
• UMC Reports Sales for December 2023

Wednesday, January 3, 2024

• Korea's AI chip companies gear up for CES 2024
• MulticoreWare and Imagination collaboration accelerates automotive compute workloads
• BrainChip to Unveil Akida Neuromorphic Processor Enabled by Microchip's 32-bit MPU at CES 2024
• Faraday Collaborates in Arm Total Design to Provide Arm Neoverse CSS-based Design Services
• VESA Updates Adaptive-Sync Display Standard with New Dual-Mode Support
• German Court Fines Netflix €7.05 Million for Continued Infringement of Broadcom HEVC Patent
• MIPS recruits former senior SiFive execs to boost RISC-V play
• MIPS Inc. (San Jose, Calif.) has recruited Drew Barbier and Brad Burgess to its leadership team, both formerly with RISC-V pioneer SiFive Inc.