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Tuesday, April 9, 2024

• Winners of the Embedded World awards
• Innova finalizes its flow and resource management software platform and opens up to the international market
• TSMC Arizona and U.S. Department of Commerce Announce up to US$6.6 Billion in Proposed CHIPS Act Direct Funding, the Company Plans Third Leading-Edge Fab in Phoenix
• Tiempo Secure - CryptoNext Security partnership, bringing High-End Post-Quantic IP Security innovation to the next level.
• Google Cloud Delivers Customized Silicon Powered by Arm Neoverse for General-Purpose Compute and AI Inference Workloads
• TSMC March 2024 Revenue Report

Monday, April 8, 2024

• Xiphera Launches nQruxâ„¢ Family of Hardware Trust Engines for Hardware-Isolated Cryptographic Services and Computing Environments
• Semiconductor design innovation: how EDA initiates the digitalization journey for a smarter, sustainable future.
• Intel Unleashes Enterprise AI with Gaudi 3, AI Open Systems Strategy and New Customer Wins
• Synopsys Launches New Offering for Comprehensive Software Supply Chain Security
• RISC-V compiler toolset targets automotive functional safety
• AI-Driven HBM Uptake Is Power-Sensitive
• MIPS Continues To Expand With The Addition Of Industry Leaders from NVIDIA, Google and SiFive
• Rebellions Selects Arteris for Its Next-Generation Neural Processing Unit Aimed at Generative AI
• Electronic System Design Industry Posts $4.4 Billion in Revenue in Q4 2023, ESD Alliance Reports
• Xiphera Launches nQrux™ Family of Hardware Trust Engines for Hardware-Isolated Cryptographic Services and Computing Environments
• Autotalks and Secure-IC Collaborate to Create the Most Secure V2X Communication Chipset
• Xiphera Launches nQrux™ Family of Hardware Trust Engines for Hardware-Isolated Cryptographic Services and Computing Environments
• TASKING presents compiler toolset for RISC-V in safety- and security-critical automotive applications
• SiFive Unveils the HiFive Premier P550, the First Commercially Available Out-of-Order RISC-V Development Board
• Ambiq and PUFsecurity Join Forces on Energy-Efficient, Security-Enhanced SoC with PUF-based Root of Trust
• Arm Accelerates Edge AI with Latest Generation Ethos-U NPU and New IoT Reference Design Platform
• VeriSilicon showcased its latest power-efficient IP applications at Embedded World 2024

Sunday, April 7, 2024

• TSMC Arizona and U.S. Department of Commerce Announce up to US$6.6 Billion in Proposed CHIPS Act Direct Funding, the Company Plans Third Leading-Edge Fab in Phoenix
• Industry Leading PPA EFPGA And DSP/AI In Development For TSMC N5/4/3
• Enhancing Security with Securyzrâ„¢ iSE with integrated Hypervisor
• UMC Reports Sales for March 2024
• IAR, Nuclei, and MachineWare Join Forces To Speed Up Innovation in RISC-V ASIL Compliant Automotive Solution
• GUC Monthly Sales Report - March 2024
• Ceva Launches Multi-Protocol Wireless Platform IP Family to Accelerate Enhanced Connectivity in MCUs and SOCs for IoT and Smart Edge AI Applications
• Enhancing Security with Securyzr™ iSE with integrated Hypervisor
• Secure-IC partners with COONTEC to help strengthen Embedded Cybersecurity in South Korea
• Sondrel CEO steps down as chip firm faces re-organization
• PCIe 7.0 specification reaches "half way point"
• Imagination's new Catapult CPU is driving RISC-V device adoption
• Silicon-Proven 12-Bit 5Msps ADC IP Core for High-Speed Data Conversion, Now Available for Licensing
• MIPS Expands RISC-V Ecosystem Support to to Enable Early Software Development for Multi-threaded Cores
• RISC-V International Achieves Milestone with Ratification of 40 Specifications in Two Years
• Via LA Announces Extension of HEVC Patent Pool to Include VVC and Welcomes TCL Into Newly Formed Program

Thursday, April 4, 2024

• It Is Time To Take Intel Seriously As A Chip Foundry
• Semidynamics announces All-In-One AI IP for super powerful, next generation AI chips

Wednesday, April 3, 2024

• Japan Approves $3.9 Billion Subsidy for Rapidus
• Why Schneider Electric Backs AI & Data to Power Net Zero
• New RISC-V microprocessor can run CPU, GPU, and NPU workloads simultaneously
• RED Semiconductor announces VISCâ„¢ licensable high performance processor architecture for RISC-V
• Global Semiconductor Sales Increase 16.3% Year-to-Year in February
• Why have all broadcast powerhouses embraced intoPIX JPEG XS? Unraveling the secret behind industry leaders' unanimous adoption!
• NeuReality Boosts AI Acelerator Utilization With NAPU
• The Crucial Role Of Semiconductors In The Transition Toward A Greener World
• sureCore announces low power memory compiler for 16nm FinFET
• Defacto now part of Arm's Partner Catalog

Tuesday, April 2, 2024

• Chip production TSMC and United Microelectronics shut down after earthquake
• Electronic Waste Rising Five Times Faster than Documented E-waste Recycling: UN
• AI-generated Code: The Fourth Component of Software Development
• Intel and Synopsys Reveal First Heterogeneous Chiplet Design Based on UCIe Does This Chip Hold the Future of the Semiconductor Industry?
• Defacto part of ArmÂ’s Partner Catalog
• Intel Outlines Financial Framework for Foundry Business, Sets Path to Margin Expansion
• Think Silicon to Showcase its Latest Ultra-Low-Power 3D Graphics and AI in One IP Architecture at Embedded World 2024

Monday, April 1, 2024

• Battery passports for greater sustainability
• Microsoft-Funded Quantum Startup Plants Flags in Europe
• Red Semiconductor announces VISC extension to RISC-V
• Hailo Closes New $120 Million Funding Round and Debuts Hailo-10, A New Powerful AI Accelerator Bringing Generative AI to Edge Devices
• NEDO Approves Rapidus' FY2024 Plan and Budget for "Research and Development of 2nm-generation semiconductor integration technology and short TAT manufacturing technology based on Japan-US collaboration"
• Ezurio and Packetcraft Introduce Talking Sensor Rapid Prototyping Kit with Bluetooth Auracast Broadcast Audio Capability
• Proprietary Memories Are a High-Risk Endeavor

Sunday, March 31, 2024

• French backing for Sequans ahead of Embedded World
• Codasip to exhibit CHERI security, HW/SW co-optimization
• Synopsys SNUG: AI driven EDA momentum, new tools for multi-die
• JESD204B & JESD204C Tx-Rx PHY & Controller IP Cores in 28nm are available for immediate licensing with Proven Automotive Compatibility

Thursday, March 28, 2024

• First general-purpose 32-bit RISC-V MCUs with internally developed CPU core
• China's Intel, AMD Ban Helps Local Rivals, Analysts Say