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Sunday, February 4, 2024

• Nordic Semiconductor signs multi-year deal to use Arm IP
• Eliyan Breaks Chiplet Memory Wall With Standard Packaging
• NoC configuration tool takes makes complex SoC design easier
• Samsung Receives Maiden 2nm AI Accelerator Order, Including HBM and Advanced Packaging
• AccelerComm Launches PUSCH Channel Simulator for 5G L1 Performance Evaluation
• Global Semiconductor Sales Decrease 8.2% in 2023; Market Rebounds Late in Year
• YorChip announces partnership with Digitho for enabling Secure Chiplets
• syn1588® IP Cores: Setting the Gold Standard in Precision for Clock Synchronization
• Eliyan Sets New Standard for Chiplet Interconnect Performance with Latest PHY Delivering Data Rate of 64Gbps on 3nm Process Using Standard Packaging
• Faraday Announces Plans to Develop Arm-based 64-core SoC on Intel 18A Technology
• Elevate Your Display and Camera SOC Capabilities with our latest Silicon Proven MIPI C-D Combo Tx/Rx PHY and DSI Controller IP Cores
• GUC Monthly Sales Report - January 2024
• Nordic Semiconductor and Arm reaffirm partnership with licensing agreement for latest low power processor designs, software platforms, and security IP

Friday, February 2, 2024

• Both Samsung and TSMC will be keeping 2nm chip manufacturing in their home countries

Thursday, February 1, 2024

• Cadence Unveils Millennium Platform - Industry's First Accelerated Digital Twin Delivering Unprecedented Performance and Energy Efficiency
• Tenstorrent Engineers Talk Open-Sourced Bare-Metal Stack
• SignatureIP launches its new iNoCulator NoC configuration tool with a free trial offer

Wednesday, January 31, 2024

• Women in Electronics - Challenges Remain
• Wi-Fi Certified 7 Is Here. A Wave of Qualified Products Follow Suit
• Marquee Semiconductor Engages Industry Veteran Gideon Intrater as Strategic Advisor
• BellSoft releases Liberica JDK 21 for RISC-V with support
• Codasip achieves certification for automotive functional safety and cybersecurity

Tuesday, January 30, 2024

• Synopsys Inaugurates Chip Design Center in Noida
• Europe's home-grown processor
• Introduction to AccelerComm© PUSCH Channel End-to-End Simulator
• Cadence Significantly Advances ECAD/MCAD Convergence for Electronic Systems with New Celsius Studio AI Thermal Platform
• Satisfy Your Chiplet Craving at the Chiplet Summit
• Navigating the RISC-V Revolution in Europe
• Alphawave Semi and Teledyne LeCroy Unveil PCIe 7.0 Signal Generation and Measurement
• Nubis Communications and Alphawave Semi Showcase First Demonstration of Optical PCI Express 6.0 Technology

Monday, January 29, 2024

• Intel Plans to Utilize TSMC's 2nm Technology in Its New Nova Lake Processor
• Device and Data Security in the Embedded Systems
• Alphawave Semi and proteanTecs Collaborate to Provide System Insights and Analytics for Custom Silicon and Chiplets
• Arteris Selected by Rain AI for Use in the Next Generation of AI
• DCD celebrates 25 years

Sunday, January 28, 2024

• Strengthening the security of broadband 5G/6G communication networks
• TASKING Supports Arm Architecture for Automotive Development
• Silvaco Joins GaN Valley™, a Wide Bandgap Semiconductor Innovation Ecosystem in Europe
• INTERCHIP achieves 3x faster verification for next-gen clocking oscillator with Siemens' advanced analog and mixed-signal EDA technology
• T2M-IP Unveils Best-Selling DVB-T2/T Demodulator IP Core with Cutting-Edge Features, Silicon Proven and Ready to License

Thursday, January 25, 2024

• Siemens-Heineken Partnership & Digital Twin Decarbonisation
• Beyond Silicon: New Sustainable Method for Creating Organic Semiconductors
• CEO Interview: Charlie Janac of Arteris -- "Pick a Viable Path, Don't Give Up"
• AMIQ EDA Releases Major Customer-Focused Product Line Update

Wednesday, January 24, 2024

• Intel and UMC Announce New Foundry Collaboration
• Logic Fruit Technologies Launches FlexRay RTL IP CORE
• China ten years behind and staying there
• Qualinx partners with EU Space Agency to develop a GNSS receiver for a service to detect spoofing and boost resilience
• Xylon's logicBRICKS HDR ISP IP Suite Gets an RGB-IR Image Processing Upgrade
• Frontgrade Gaisler and RISC-V's Space Journey
• Solving the decarbonization equation
• eMemory's Security-Enhanced OTP Qualifies on TSMC N4P Process, Pushing Forward in High-Performance Leading Technology

Wednesday, January 24, 2024

• Keysight Introduces Chiplet PHY Designer for Simulating D2D to D2D PHY IP Supporting the UCIeâ„¢ Standard

Tuesday, January 23, 2024

• SoC design: When a network-on-chip meets cache coherency
• Report: Apple will be first to receive TSMC's 2nm chips starting in 2025
• Keysight Introduces Chiplet PHY Designer for Simulating D2D to D2D PHY IP Supporting the UCIe™ Standard