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Sunday, January 21, 2024

• Alphawave Semi - Q4 2023 Trading and Business Update
• T2M Unveils ASIL B-Certified CAN and LIN IP Cores, Securing 11 Licenses in 2023

Saturday, January 20, 2024

• Samsung's 2nd-Gen 3nm Process, SF3, Has Begun Trial Production

Thursday, January 18, 2024

• AI to drive strong chip market growth in 2024, says TSMC
• TSMC Reports Fourth Quarter EPS of NT$9.21
• Cadence Unveils New Palladium Z2 Apps with Industry's First 4-State Emulation and Mixed-Signal Modeling to Accelerate SoC Verification

Wednesday, January 17, 2024

• Frontgrade Gaisler and RISC-V's Space Journey
• ITRI and TSMC Collaborate on Advancing High-Speed Computing with SOT-MRAM
• Samsung and TSMC competing to dominate 2nd-gen 3nm at global foundry industry

Tuesday, January 16, 2024

• India's Electric Vehicle (EV) Ecosystem
• Soitec Implements Water Reuse in Wafer Fabs
• How Synopsys' acquisition of Ansys could streamline design and simulation
• Brian Philofsky Joins Flex Logix As Senior Director Of Solutions Architecture
• YorChip, Inc. announces its first Chiplet for Edge AI applications with IP licensed from Semidynamics, the leader in RISC-V IP based in Barcelona
• Innatera shows RISC-V neuromorphic edge AI microcontroller
• OIF Unveils CEI-112G-XSR+-PAM4 Extended Extra Short Reach Implementation Agreement, Paving the Way for Advanced Interconnectivity
• Innatera unveils its groundbreaking ultra-low power neuromorphic microcontroller
• POLYN Announces Agreement with SkyWater Technology to Produce its First Commercial Voice Processing Chip
• BrainChip and MYWAI Partner to Deliver Next-Generation Edge AI Solutions
• NVM Express Announces the Release of the Computational Storage Feature

Tuesday, January 16, 2024

• Andes Announces General Availability of the New RISC-V Out-Of-Order Superscalar Multicore Processor, the AndesCoreâ„¢ AX65

Monday, January 15, 2024

• Video: Leveraging the RISC-V efficient trace (E-Trace) standard
• proteanTecs Launches Power Reduction Solution for High Performance Markets
• Gartner Says Worldwide Semiconductor Revenue Declined 11% in 2023
• Synopsys to Acquire Ansys, Creating a Leader in Silicon to Systems Design Solutions
• Chiplet Makers Expect to Disrupt Incumbents
• MIPS Aims to Give Back Control, for AI-Centric Compute

Sunday, January 14, 2024

• Media Alert: Rambus to Announce Fourth Quarter and Fiscal Year 2023 Results
• Cadence Wins TCSA Top 10 Foreign Sustainable Model Companies Award
• Are Low Carbon Nanomaterials the Key to a Greener Tomorrow?
• Davos: HCLTech CSO Jayaram on Need for Sustainability Speed
• High-bandwidth memory (HBM) options for demanding compute
• Unveiling Sonata: Affordable CHERI Hardware for Embedded Systems
• Crypto Quantique and iMQ to enable quantum secure chip-to-cloud connection
• EnSilica adds Post Quantum Cryptography support to eSi-Crypto IP library
• EdgeCortix Expands Leadership Team with Semiconductor Industry Veteran Tim Vehling as Executive Vice President of Global Sales
• Digital Blocks AMBA Multi-Channel DMA Controller IP Core Family Extends Leadership with releases for core DMA Engines in RISC-V® & ARM® Systems and Peripherals to Memory Applications
• Unveiling a Cutting-Edge 12-bit 5Msps SAR ADC IP Core - Industry-Leading Features, Silicon Proven, and Available for Licensing Now
• Digital Blocks AMBA Multi-Channel DMA Controller IP Core Family Extends Leadership with releases for core DMA Engines in RISC-V® & ARM® Systems and Peripherals to Memory Applications

Saturday, January 13, 2024

• Google to Samsung: Circular Tech Strategies Unveiled at CES

Friday, January 12, 2024

• Chip wars: How 'chiplets' are emerging as a core part of China's tech strategy

Friday, January 12, 2024

• Andes Technology and Spacetouch Collaborate to Unveil High-Tech Edge-Side AI Audio Processor Featuring the Powerful RISC-V AndesCoreâ„¢ D25F

Thursday, January 11, 2024

• An Open Platform for Software-Defined Vehicles: Expectations vs. Reality
• Edge-side AI audio processor now features RISC-V AndesCore D25F
• [CES 2024] Samsung to continue investing in HBM in 2025
• Crypto Quantique joint venture with iMQ Technology to enable Quantum Secure Chip-to-cloud Connection

Wednesday, January 10, 2024

• EU quantum researchers set to give up IP rights in standard-setting race
• Crypto Quantique partners with Blaitek to enable quantum secure chip-to-cloud connection
• Digital Core Design Presents D68000-CPU32+ for well-known 68k family

Tuesday, January 9, 2024

• NFC Forum Supports Emerging Regulatory Requirements for Sustainable Product Development
• Crypto Quantique and iMQ to enable quantum secure ship-to-cloud connection
• Intel buys Silicon Mobility alongside automotive chiplet push
• Intel, Samsung, TSMC 'Getting Serious' About CFET
• SCALINX, Leading Fabless Semiconductor in System-on-a-Chip Design, Secures €34 Million in Second Round Funding
• Ceva and Actions Technology Commemorate Landmark Achievement, Surpassing 100 Million Ceva-Powered Wireless Audio and AIoT Processors Shipped
• intoPIX Showcases Groundbreaking Sensorand Video Compression Technologies at CES 2024
• Sunplus and Ceva Expand Collaboration to Bring Bluetooth Audio to the airlyra SoC Family for Wireless Speakers, Soundbars and other Wireless Audio Devices
• GUC Tapes Out Complex 3D Stacked Die Design on Advanced FinFET Node Using Cadence Integrity 3D-IC Platform
• CXL Overcomes Hierarchical Routing Limits
• SCALINX, Leading Fabless Semiconductor in System-on-a-Chip Design, Secures €34 Million in Second Round Funding
• TSMC December 2023 Revenue Report
• Global Semiconductor Sales Increase 5.3% Year-to-Year in November
• Packetcraft and Synopsys Collaborate to Deliver Turnkey Bluetooth Qualified 5.4 PAwR and LE Audio Solutions
• CEO interview: MIPS' Sameer Wasson on a RISC-V reboot
• Atmosic Introduces the Multiprotocol ATM34/e Series Adding 802.15.4 Support for Thread and Matter to its Bluetooth LE Portfolio