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Tuesday, June 14, 2005

• Discretix And ARM To Offer A Full Solution For Secure 32-bit Flash Controllers

Tuesday, June 14, 2005

• IP gurus discuss interoperability

Tuesday, June 14, 2005

• Yamaha Selects ZSP(R) Cores and Audio Software to Speed Multimedia Applications to Market

Tuesday, June 14, 2005

• Poseidon automates the generation of hardware accelerator modules for Xilinx Virtex-4 FPGAs

Tuesday, June 14, 2005

• IndigoVision Technology Behind New Cell-Phone MPEG-4 Chip

Monday, June 13, 2005

• Silicon Image Ranks Among Top 10 in Semiconductor IP Survey

Monday, June 13, 2005

• IBM Extends Industry Leading Custom Chip Technology to Embedded Devices

Monday, June 13, 2005

• NEC Electronics Provides ISSP Structured ASIC Customers

Monday, June 13, 2005

• SMIC Adds New Design Kit for its 0.18um CMOS Process for Use with Agilent Technologies'EDA Software

Monday, June 13, 2005

• CoWare Introduces CORXpert Technology to Help Boost Processor Performance

Monday, June 13, 2005

• Altera and Mango DSP Announce Bluejay Video Processing Board Featuring Stratix II FPGAs

Monday, June 13, 2005

• CoWare Delivers SystemC Models for PMC-Sierra's RM7900 Processor Family

Monday, June 13, 2005

• Trading analog intellectual property

Monday, June 13, 2005

• CoWare and MIPS Technologies to Automate Application-Optimized Processor Creation

Monday, June 13, 2005

• D2 Technologies to Provide Optimized VoIP Algorithms for New High-Performance MIPS32®24KE Cores

Monday, June 13, 2005

• FPGA users taxed but satisfied

Monday, June 13, 2005

• Bluespec Targets Low-Power ESL Synthesis

Monday, June 13, 2005

• ARM Announces SPIRIT Support For ARM RealView Tools With MaxSim Technology To Accelerate Time-To-Market For SoC Designers

Monday, June 13, 2005

• ARM Libraries Adopted By IBM, The World's ASIC Technology Leader

Monday, June 13, 2005

• MoSys Delivers 0.13 Micron 1T-SRAM Memory Compiler

Monday, June 13, 2005

• MoSys Unveils Its 1T-SRAM ''CLASSIC Macro'' Family

Monday, June 13, 2005

• Creo Uses CAST IP Cores in Advanced Leaf Aptus Digital Camera Backs

Monday, June 13, 2005

• CAST Announces PCI Express Endpoint Controller Core

Monday, June 13, 2005

• ESL may rescue EDA, analysts say

Monday, June 13, 2005

• Analog, mixed-signal set to invigorate IP market, says Gartner

Monday, June 13, 2005

• Gartner Dataquest analyst gives ASIC, FPGA markets clean bill of health

Monday, June 13, 2005

• Gartner Says Worldwide Semiconductor IP Industry Grows 21 Percent in 2004 as Industry Experiences Significant Consolidation

Monday, June 13, 2005

• Xilinx Updates Guidance for June Quarter FY06

Monday, June 13, 2005

• Actel Corporation Announces Second Quarter Business Update

Monday, June 13, 2005

• New LTRIM Boost Converters Boast High-Efficiency - Analog IP blocks target Single and Dual battery-powered products

Monday, June 13, 2005

• LTRIM Converters Aim to Reduce Battery Use - High-efficiency Buck/Dual-mode IP Blocks Announced

Friday, June 10, 2005

• Fujitsu and Synplicity Launch Amplify AccelArray Pro Software; Qualified and Recommended Physical Synthesis Software for Fujitsu AccelArray Structured ASICs

Friday, June 10, 2005

• China to build 20 new fabs by 2008

Friday, June 10, 2005

• Spiral Gateway preps C-programmable low-power fabric

Friday, June 10, 2005

• Power issues heat up chip forum

Friday, June 10, 2005

• TSMC Reference Flow 6.0 Opens Door to 65nm Design

Friday, June 10, 2005

• LSI Logic Raises Q2 2005 Revenue Range

Friday, June 10, 2005

• Silicon & Software Systems (S3) Delivers Another First Time Right System IC Design

Friday, June 10, 2005

• Avery Design and ASIC Architect Team to Deliver PCI Express IP Solution

Friday, June 10, 2005

• SafeNet Demonstrates Interoperability with Leading Device Manufacturers at First OMA DRM V2.0 Test Fest

Friday, June 10, 2005

• TSMC Announce May 2005 Sales and Revise Upward 2Q2005 Guidance

Friday, June 10, 2005

• Imagination Technologies' PowerVR IP Incorporated in Freescale Multimedia Processor for Mobile Entertainment Devices

Friday, June 10, 2005

• Knowlent Alleviates XAUI Interface Electrical Verification Bottleneck with New Opal XAUI EVP

Friday, June 10, 2005

• German company to introduce PLL IP core at DAC

Friday, June 10, 2005

• Atheros Communications Selects Denali Verification IP for PCI Express, USB, Ethernet Designs

Friday, June 10, 2005

• Avery Design Systems Spins Up ATA Verification IP Family

Friday, June 10, 2005

• CEVA and Ignios Demonstrate Multicore DSP

Wednesday, June 8, 2005

• True Circuits Attends Design Automation Conference, Features Complete Line of PLL and DLL Intellectual Property for ASIC, FPGA and SoC Designs

Wednesday, June 8, 2005

• PCI Express train rolls across multiple tracks

Wednesday, June 8, 2005

• ST reveals plan to cut 2,300 jobs in Europe

Wednesday, June 8, 2005

• NEC Electronics America Introduces Secure Single-Chip MPEG Decoder

Wednesday, June 8, 2005

• Temento Systems announces a Distributorship agreement with SAROS Technology

Wednesday, June 8, 2005

• Faraday Monthly Sales Report - May 2005

Wednesday, June 8, 2005

• ARM Expands RealView Product Family with Fast Simulation Technology to Speed Up Software Development

Wednesday, June 8, 2005

• Cradle Enhances MPEG-4 IP Video Streamer Reference Design with Power-Over-Ethernet

Wednesday, June 8, 2005

• austriamicrosystems to manufacture Triad Semi mixed signal structured ASICs

Wednesday, June 8, 2005

• Xilinx Embedded PowerPC Solution Gains Significant Industry Adoption

Wednesday, June 8, 2005

• Epson Licenses Sarnoff's TakeCharge ESD Design IP For High-Voltage Driver ICs Used In LCD Panels

Wednesday, June 8, 2005

• Synopsys and IBM Announce Availability of Fully Synthesizable PowerPC Cores and SystemC Models

Wednesday, June 8, 2005

• Mixed Signal IP from Silicon & Software Systems for Digital Video Broadcast (DVB) solutions selected by Micronas

Tuesday, June 7, 2005

• Arteris Lays Foundation for Global Expansion, Names Industry Veteran Janac as CEO

Tuesday, June 7, 2005

• Antonio J. Viana Joins Tensilica as Sr. VP of Worldwide Sales

Tuesday, June 7, 2005

• Patriot Scientific and TPL Group Unify Portfolio of Fundamental Microprocessor Patents

Tuesday, June 7, 2005

• IBM, Chartered and Samsung Extend Common Design Enablement Platform for 65-Nanometer Base and Low-Power Processes

Tuesday, June 7, 2005

• Unique Fractional Resampling Cores from RF Engines

Tuesday, June 7, 2005

• NEC Electronics Introduces Single-Chip Secure MPEG Decoder for Set Top Boxes

Tuesday, June 7, 2005

• Altera Announces DSP Development Kit With Industry's Highest-Density FPGA

Tuesday, June 7, 2005

• Synopsys Announces DesignWare IP Support for PCI Express 1.1 Specification

Tuesday, June 7, 2005

• Denali Software and GDA Technologies Team to Deliver Comprehensive Intellectual Property Solutions for Advanced Switching Interconnect Systems

Tuesday, June 7, 2005

• Interview - Gary Meyers, president and CEO of Synplicity : FPGA or ASIC?

Tuesday, June 7, 2005

• Rambus Adds Samsung Electronics to Patent Infringement Litigation

Monday, June 6, 2005

• STMicroelectronics Adds DSP to Reconfigurable-Processor SoC for Wireless Infrastructure Applications

Monday, June 6, 2005

• Heard on the Beat: AMD-ST to merge memory units?

Monday, June 6, 2005

• Silicon Hive, a semiconductor IP supplier in the Philips Technology Incubator, Demonstrates World's First Fully Programmable Digital TV Demodulator IP Core

Monday, June 6, 2005

• Temento Systems announces PSL On Chip Verification (OCV) in new DiaLite Edition & the Release 4.5

Monday, June 6, 2005

• ARM Artisan Low Power IP Offered By IBM, Chartered To Support 65-Nanometer Common Platform

Monday, June 6, 2005

• K-Micro Licenses Virtual Silicon 90nm Mobilize PLL Digital Frequency Synthesizer

Monday, June 6, 2005

• Doors 'open' to hardware

Monday, June 6, 2005

• Synopsys Enables Rapid Adoption of SATA Interface With DesignWare Verification IP

Monday, June 6, 2005

• The Open SystemC Initiative Announces Availability of the SystemC Transaction-level Modeling Standard with Broad Industry Support

Monday, June 6, 2005

• Xilinx Announces Immediate Availability of Industry's First 4 Gbps Programmable Fibre Channel Solution

Monday, June 6, 2005

• Xilinx Announces Customer Shipments Of Virtex-4 FX60 FPGAs With Industry's First 622Mbps - 10.3125Gbps Serial Transceivers

Monday, June 6, 2005

• Xilinx, CorEdge and Yamaichi Demonstrate Flexible 10gbps Packet Processing on Industry Standard ATCA/AMC Platform

Monday, June 6, 2005

• LSI Logic Licenses ZSP500 to Renesas Technology for Mobile Applications

Monday, June 6, 2005

• Xilinx Widens Process Technology Leadership - Ships More Than 3.5 Million 90nm FPGAs

Monday, June 6, 2005

• Xilinx Virtex-II Pro World's Most Popular 130nm FPGA

Monday, June 6, 2005

• Giga Scale IC Introduces Industry's First IC Economic Analysis Engine

Monday, June 6, 2005

• Genesys Testware adds efficient automated insertion of embedded test and repair circuits for memory

Monday, June 6, 2005

• Renesas Technology Releases Enhanced aacPlus Decoding Middleware as SH-Mobile Application Processor Software

Monday, June 6, 2005

• Aware Showcases Its StratiPHY Family of DSL Solutions at SuperComm 2005; Highlights include Aware's VDSL2 intellectual property offering - StratiPHY3

Monday, June 6, 2005

• FS2 Introduces SB NAVIGATORâ„¢ Trace Tools For Sonics SiliconBackplane SMART Interconnect

Monday, June 6, 2005

• Rambus PCI Express PHY Passes Standard Compliance Testing; Silicon-Proven IP Achieves Five Entries on PCI-SIG Integrators List

Monday, June 6, 2005

• Corrent Chooses Faraday's NC-1 for Network Security Processor Chip

Monday, June 6, 2005

• Poseidon Design Systems joins Altera Access Program

Monday, June 6, 2005

• IPWireless Standardizes on ARC's Patented Configurable Core Technology for 3G Data Communications Chipset

Friday, June 3, 2005

• Memory Characterization Focus on Yield Improvements