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Wednesday, March 23, 2005

• Dolphin Integration Announces a Breakthrough for an Embedded Output Converter for high quality Audio

Tuesday, March 22, 2005

• ISQED panel takes on IP roadblocks

Tuesday, March 22, 2005

• Xelic Announces SONET/SDH Tributary Payload Processor Core Availability for Integration into ASIC or FPGA Networking Applications

Tuesday, March 22, 2005

• Zoran's COACH 7 Processor Powers Samsung's New 7 and 5 Megapixel Digital Cameras

Tuesday, March 22, 2005

• Conexant and Interpeak Launch 802.11 Wireless Solution for Embedded Developers

Tuesday, March 22, 2005

• Dr. Edward C. Ross, President Emeritus of TSMC, Joins Open-Silicon Board of Directors

Tuesday, March 22, 2005

• UMC considers taking 15% stake in Chinese fab

Tuesday, March 22, 2005

• WISchip Rolls Out New System-on-Chip Streaming Media Encoding Solution

Tuesday, March 22, 2005

• Zoran Corporation Licenses Kilopass' XPM Memory Technology; Standard CMOS Technology Adds On-Chip Security ID to Digital Entertainment Products

Monday, March 21, 2005

• Silicon Design Chain Collaboration Demonstrates Significant 90-nanometer Total Power reduction; Applied Materials, ARM, Cadence and TSMC Integrated Capabilities Deliver Silicon-Validated Power Reduction

Monday, March 21, 2005

• Tower Semiconductor Honored by ON Semiconductor for Outstanding Support

Monday, March 21, 2005

• LTRIM LTR1761 LDO Voltage Regulator IP Available for IBM 0.13um Process Technology

Monday, March 21, 2005

• MoSys Signs First EDA to Its International Sales Representative Network; Newest Partnership Covers UK and Ireland

Monday, March 21, 2005

• Altera Demonstrates Industry's First FPGA Solution Enabling Video-Over-IP at CCBN

Monday, March 21, 2005

• Architectures: On-chip interconnect gets off the bus

Monday, March 21, 2005

• FPGA merger with processors gathers steam

Monday, March 21, 2005

• Infineon Technologies and Rambus Conclude Broad Licensing Agreement

Monday, March 21, 2005

• Rambus Updates First Quarter 2005 Financial Guidance

Monday, March 21, 2005

• Structured ASICs walk a fine line

Monday, March 21, 2005

• Teldix Selects Actel's ProASIC Plus FPGAs for Multi-Processor Boards Used in the Eurofighter Project

Monday, March 21, 2005

• System-in-package (SIP) may not be that simple

Friday, March 18, 2005

• Video codec is a study in power

Friday, March 18, 2005

• Virtio Jumpstarts Mobile Multimedia with Support for Texas Instruments OMAPV1030 Platform

Friday, March 18, 2005

• SigmaTel, Inc. Files Formal Complaint with ITC Against Actions Semiconductor for MP3 Player Technology Patent Infringement

Friday, March 18, 2005

• RF Engines contracted to supply signal processing cores to leading mobile telecommunications company

Friday, March 18, 2005

• ChipX Accelerates Development of XM Satellite Radio Receivers; ChipX Structured ASICs Provide Fast Turnaround Time, Low Risk to High-volume Production

Friday, March 18, 2005

• SeaSolve Software Inc. Announces IEEE 802.15.4 WPAN And IEEE 802.11 WLAN Compliance Test And Analysis Solution

Friday, March 18, 2005

• FSA Announces 27 Percent Worldwide Fabless Revenue Growth in 2004

Friday, March 18, 2005

• CEVA to file Form 12b-25 With the Securities and Exchange Commission

Friday, March 18, 2005

• EDA exec offers alternative IP channel

Thursday, March 17, 2005

• Fabless firms outpace IDMs in costs, gross margins

Thursday, March 17, 2005

• Xilinx R&D Center in India Helping Customers Worldwide Benefit From Programmable Chip Technologies; Creates 12 IP Cores in First Year of Operation Through Partnership with CMC

Thursday, March 17, 2005

• Texas Instruments and Imagination Technologies Create Gaming and Graphics Ecosystem Leveraging TI's OMAP 2 "All in One Mobile Entertainment" Platform

Thursday, March 17, 2005

• IPCore and eMemory form alliance to provide a comprehensive single-poly OTP solution

Thursday, March 17, 2005

• Rambus Appoints J. Thomas Bentley to its Board of Directors

Thursday, March 17, 2005

• Rambus Opens Design Center In Bangalore, India

Wednesday, March 16, 2005

• Virtual Silicon's Ground-breaking Mobilize Power Management IP Wins EDN INNOVATION Award

Wednesday, March 16, 2005

• Huaya Microelectronics Ltd Licenses MIPS Processor for Its DTV Products

Tuesday, March 15, 2005

• Arithmatica IP selected by Xilinx for Virtex-4 XtremeDSP(TM) Slice

Tuesday, March 15, 2005

• Panelists peer into future of FPGAs
• Costello's analog automation pioneer, Barcelona, to fold
• Gurus mull challenges of 65 nm at Global Press Summit
• Need for debug doesn't stop at first silicon
• Rhines draws roadmap for verification
• DVCon speaker compares assertion languages
• Panelists debate role of design, verification teams
• A broader look at ESL design
• How ESL becomes a business imperative
• Synopsys modifies guidance for first quarter, fiscal 2005
• CoWare, targeting system design, plans IPO
• How to select verification IP
• Synopsys shift caused EDA decline, analysts say
• Tool vendors dispute report of downturn in ESL
• Panel ponders present, future of verification IP

Tuesday, March 15, 2005

• Analysis: Will ARM-Artisan merger be a defining moment?
• IEEE takes first steps to standardize SystemC
• Legal hurdles slow ARM-Artisan merger
• Why full-chip formal verification is possible
• Smart Design
• Scan design called portal for hackers
• Design complexity drives need for ESL
• Synopsys says it will shelve Monterey's tools
• Complex chips reignite demand for design services
• FSA panel debates crosstalk doom
• System level design is here, Synopsys CTO says
• Indian design house rolls IP verification suite
• Open-source cores to aid in system design
• Verification IP complexity approaches design IP
• ESL tools: Are EDA giants in the game?
• ARM sees future of IP in Artisan
• 'Divide and conquer' with verification IP (by Kevin Silver, Denali Software)
• ESL startup tools for processor-based design
• PCI Express made easy
• Cost pressures spotlight design-for-reuse
• U.S. EE forms outsourcing firm in Russia
• IP sale helps Cadence meet Q2 revenues
• Carbon, CoWare link RTL to SystemC
• Barcelona swaps IP model for EDA licensing
• NEC engineers advance hardware/software co-verification
• Transition to 90-nm raising tough design issues
• What's needed for mixed-signal verification (by Bijan Kiani, Synopsys VP of Marketing)
• IBM, Chartered claim broad EDA support at 90 nm
• CriticalBlue releases coprocessor synthesis tool
• Magma to expand into structured ASICs, FPGAs
• Platforms key to cost reduction: Rhines
• TSMC prepares MIM memory at 90-nm node
• Tool Talk: Will 3D chips challenge SoCs?
• Synopsys tight-lipped about MoSys lawsuit
• Denali offers PCI Express compliance suite
• VIP verifies PCI Express
• Canceled Synopsys-MoSys deal seen headed to court
• Prolific Inc., Circuit Semantics Inc. and Legend Design Technology Inc. team on manufacturability
• Synopsys CEO defends MoSys acquisition
• Panelists laud 'Nordstrom' approach to IP quality
• Commentary: Spec raises bar for IP and SoC verification
• Panel debates fate of IP core startups
• Training firm offers free Vera TCP/IP packet generator with a built-in functional coverage tracker

Tuesday, March 15, 2005

• Research centre for SoC opens in Belfast
• Tower aims to ship ICs made on 130-nm process in 2005
• MPEG-only bows out of codecs race; H.264 and VC-1 still contending
• Free Sparc processor developer goes "commercial"
• Freescale reorganizes chip unit, denies MPU biz for sale
• UMC chairman denies doing wrong in letter to Taiwan prosecutor
• Mitsubishi demonstrates H.264 encoding
• Intel licenses 1066-MHz bus technology to SiS
• ARC populates 600, 700 roadmaps with exemplar cores
• IBM, Sony, Toshiba tip 'Cell' processor at 90-nm
• STMicro debuts RISC-based configurable SoC

Tuesday, March 15, 2005

• ASICs face stiffening competition from ASSPs, says analyst
• SOI embedded DRAM running on Freescale 90-nm process
• ARM begins work on "Serval-E" processor core
• Analysis: Fabless to benefit as foundries face tough Q1
• Transmeta to cut 100-200 jobs
• India's chip initiative stresses IP
• Japanese companies look to integrate, not outsource
• Heard on the Beat: new chairman named at FSA
• ARM shares slip as Artisan acquisition completed
• Chinese foundry ASMC to move ahead with IPO
• SMIC reduces Q4 guidance, cites industry slowdown
• The CTO interview: with Ivo Bolsens of Xilinx
• IBM, Samsung, Infineon, Chartered describe 65-nm process
• Spirit consortium releases IP integration standard
• ST keynoter sings praises of transaction level modeling
• APIs can help handle FPGA complexity, says Xilinx CTO
• Standards panel outlines ESL progress
• IP SoC panel touts multithreading
• IP licensees expand config core options
• A new role for configurability
• Export ruling could increase U.S. licensing requirements, group warns
• Imagination Technologies, UK hardware IP group stuck with flat sales and losses
• Chip makers debate clock frequency, architecture in apps processors
• VIA to license 3Com patents

Tuesday, March 15, 2005

• ARM to establish design center in India
• ST preaches new 'Gospl' (Generalized Open Source Programmable Logic) for programmable logic
• Toshiba files memory patent suits against Hynix
• China to build five 300-mm wafer fabs by 2006
• Smart Processors
• India moves closer to building a fab
• Fabless industry in China to quadruple by 2008, says iSuppli
• Chartered predicts sales decline as orders weaken
• SMIC's Q3 sales up 24%, sees 99% fab utilization
• No cost benefit in China wafer fab, says TSMC's Chang
• Profits up as sales dip at Xilinx, further drop forecast
• Chartered reportedly denies sale rumors
• ARM's CEO lays out 'Tiger' processor's trajectory
• Embedded CPUs take on media tasks
• IP model shift: from blocks to app-specific subsystems
• SMIC confirms 90-nm foundry technology plans
• Foundries face inventory correction, then downturn
• Freescale embraces IMEC multiprocessor approach
• Matsushita, Tower deploying 0.18-micron embedded flash
• TSMC to see slow Q4 as foundry market declines
• M2000 starts offering IP cores and tools that marry ASIC and FPGA design
• STMicro to reorganize as senior executives depart
• SMIC opens 300-mm wafer fab in Beijing
• Flash memory market to continue growth, researcher finds
• Chartered pushing 65 nm ahead

Tuesday, March 15, 2005

• Outsourcing to India shifts to R&D
• Agilent receives patent on USB test spec
• SMIC looks to China's fabless firms, touts 90-nm
• Intel will demo its first multi-core CPU at IDF
• Altera pre-announces shortfall for Q3
• It's an outsourced world, EEs acknowledge
• MIPS chief sees no threat from ARM-Artisan tie-up
• Outsourcing backers say move up food chain, foes question new job claims
• Panel reviews PDK checklist efforts
• Appeal ruling reportedly goes against Rambus
• Next-gen memory market to reach $66 billion
• Silicon foundry market in flux as market stalls
• Embedded Linux gains on Microsoft, Wind River
• 1394 finding design-ins despite competition, says report
• Japan's SoC effort forges standard fab network
• Structured ASIC market to grow 55%, says Semico
• Philips points Target compilation at Coolflux DSP
• Amphion Semiconductor, a DSP core firm sold to Conexant, says report
• NEC merges process, SoC units
• Design costs for complex chip architectures reaching $100 million
• Crolles alliance rolls 65-nm process
• SOI mobility harmed by scattering, Toshiba researchers report
• SuperH to close, engineers reassigned, says report
• SMIC receives 300-mm wafer equipment for Fab 4
• Pixelworks rolls line of video decoder SoCs
• Intel targets three processors for embedded market
• Toshiba to promote MeP core with tool vendors, design houses
• VSIA group shakes up its foundations
• French startup tackles SoCs for emerging WiMAX market
• Altera rolls next-gen Nios processor

Tuesday, March 15, 2005

• TSMC's sales falls 18% amid silicon foundry lull
• GlobalPress Summit panelists debate route to working SoCs
• PCI Express adoption could boost TSMC in Q2, says report
• Canadian embedded memory startup emerges
• Like it or not, IP's here to stay
• Consumer Electronics Market Requires IP-Rich Custom SoCs for Hardware Differentiation
• Out for bear: CxOs grapple with tech stock collapse
• Flexibility key to profitability (by Carl Schlachte, CEO, ARC International)
• In embedded, CPU progress is evolutionary
• Startup Novocell Semiconductor devises initial IP for security, wireless
• System houses remain weak link for silicon foundries
• ARM updates 'vision', aims to be in all digital chips
• World Semiconductor Council takes aim at IP protection
• Philips claims new 90-nm chip is 'right-first-time'
• Revived venture capital markets pose new challenges
• ARM presents 'Optimode' strategy
• IP investment offers risks, opportunities
• Embedded platform company receives $7 million boost
• STMicroelectronics to grow Czech IP design center
• MPEG group sues Sagem for video patent infringement
• SoC brings satellite-like features to cable
• Soft errors become hard truth for logic
• Foundries surge, the fabless fret
• Zigbee efforts alter Philips Semi plans
• Tensilica patent claims voided
• Startup raises $3.8 million to support multi-core SoCs
• Panel mulls configurable, reconfigurable IP for SoCs
• UMC's first quarter sales up 41.5% over 2003
• TSMC readies new business strategy
• Sharp unit to license IP from U.S. labs
• Analysis: Choice of ASIC gate width can be boon to design
• Startup IPextreme repartitions Bluetooth radio

Tuesday, March 15, 2005

• Wipro tops offshoring list
• IMEC proposes three memories for embedded RAM
• Power management movement shows energy
• EETimes' Industry Challenge: When requirements outrun an architecture
• EETimes' Industry Challenge: Assessing the structured-ASIC alternative
• IP expectations (by Melissa Jones, President, Ultimodule)
• Standards-based IP (by Michael Kaskowitz, President, VSI Alliance)
• Application convergence

Tuesday, March 15, 2005

• Intel introduces logic chip sets, storage I/O processor

Tuesday, March 15, 2005

• Toshiba Launches Family of SATA PHY Cores That Meet High Speed Requirements of Storage, Networking and Consumer Markets

Tuesday, March 15, 2005

• ZAiQ Technologies and ProDesign Integrate High Speed Transaction-Based Verification System

Tuesday, March 15, 2005

• Design outsourcing a challenge

Tuesday, March 15, 2005

• MindTree to demonstrate its Bluetooth capabilities on OMAP and Nucleus at CTIA Wireless 2005

Tuesday, March 15, 2005

• Rambus Demonstrates Its 800MHz DDR2 Memory Controller Interface At Denali MemCon In Taiwan

Tuesday, March 15, 2005

• MoSys 1T-SRAM IP Ships in HUDSON Soft's Video Game Controller; Video Game Controller in Volume Production Targets Toy Markets

Tuesday, March 15, 2005

• NEC Electronics America Expands ASIC IP Portfolio with Tensilica’s Xtensa Configurable Processor

Monday, March 14, 2005

• Arteris introduces industry's first products for building networks on Chip (NoC)

Monday, March 14, 2005

• CEVA-TeakLite DSP License Extended By STMicroelectronics For Next Generation DSL Central Office Chipsets

Monday, March 14, 2005

• Industry Study Reaffirms Reliability of Actel FPGAs Against Radiation-Induced Failures

Monday, March 14, 2005

• LSI Logic Introduces RapidChip Xtreme2(TM) Family With Unprecedented SERDES Integration and I/O Bandwidth

Monday, March 14, 2005

• U.S. District Judge Rules to Disqualify Patriot Scientific Corporation's Counsel and to Deny Witness Testimony

Monday, March 14, 2005

• Digital Core Design will take part in the EU Gateway to Japan

Monday, March 14, 2005

• Tensilica Expands Into China

Monday, March 14, 2005

• Falanx Announces Availability of Geometry Processors for Mobile Gaming