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Thursday, January 19, 2023

• Comcores TSN technology and 5G communication expertise to be deployed in a significant EU funded project with pan-European partners

Wednesday, January 18, 2023

• Electric vehicles: CEA and Renault Group develop a very high efficiency bidirectional on-board charger
• Analog Bridges Digital Electronics in IoT Designs
• Foundry Revenue Is Forecasted to Drop by 4% YoY for 2023 Due to Slow Inventory Consumption and Falling Wafer Input from Customers, Says TrendForce
• Andes Technology Collaborates with LDRA to Deliver Integrated Tool Suite for Safety-Critical Software on Andes RISC-V CPU Solutions
• Automotive-grade module marries Wi-Fi 6E, Bluetooth LE Audio
• XConn Achieves First-Pass Silicon Success for CXL Switch SoC with Synopsys CXL and PCI Express IP Products

Tuesday, January 17, 2023

• Vsora Unveils AI Chip Family to Enable L2-L5 Autonomous Driving
• Alphawave IP renames as it looks to 2nm
• Seven trends for the security industry in 2023
• Analog Bits Awarded ISO 9001 and ASIL B Ready Certifications

Monday, January 16, 2023

• Imagination Technologies Reimagines GPUs With Ray Tracing
• Stadia's Bluetooth controller tool now live so users can connect to other devices
• France to Invest €500M in Deeptech Startups by 2030
• 5 top IoT sustainability trends for 2023
• GA-ASI selects Siemens Xcelerator for digital transformation
• Why Quantum Computing Capabilities Are Creating Security Vulnerabilities Today
• Risc-V MCUs have 8 to 20 pins
• Settlement Reached in Lawsuit Brought by Tachyum Against Cadence
• Gartner Says Worldwide Semiconductor Revenue Grew 1.1% in 2022

Sunday, January 15, 2023

• Samsung 3nm process yield is 'perfect'
• TSMC weighs new plants in Japan and Europe
• National Instruments up for sale
• Analog IPs Automate Integration, Tune to Fab Nodes
• Unveiling the Future of Home Entertainment: a truly immersive Multimedia experience through HDMI 1.4 Tx-Rx PHY and Controller IP Cores

Thursday, January 12, 2023

• Cadence Now Supports Dolby Atmos for Cars
• Certus Semiconductor releases ESD library in GlobalFoundries 12nm Finfet process
• Imagination collaborates with Synopsys to accelerate 3D visualisation in mobile and data centre
• Alphawave to outline long-term strategy and financial targets
• Alphawave Semi: Q4 2022 Trading and Business Update

Thursday, January 12, 2023

• Arteris Announces New Employment Inducement Grants

Wednesday, January 11, 2023

• Andes Unveils Details of its Entry Level D23 RISC-V Processor Core
• The Importance of 3D IC Ecosystem Collaboration
• Apple to replace Broadcom IC with in-house designed part
• EDA Tools for Analog: Where Do I Go From Here?
• VSORA Secures $4.2 Million in Financing from Otium Capital, Angel Investors
• Chipletz selects Siemens' EDA solutions for its Smart Substrate IC packaging technology
• TSMC Reports Fourth Quarter EPS of NT$11.41
• Creonic DVB-GSE Encapsulator and Decapsulator IP Cores Are Now Available with Data Rates of up to 4Gbit/s
• Alphawave IP Announces Appointments to its Executive Leadership team

Tuesday, January 10, 2023

• ADAS Back in the Driver's Seat at CES 2023
• Bluespec collaborates with Synopsys to address growing verification demands for RISC-V design community
• Quantum Computing–Top Questions Answered
• Samsung and SK Hynix planing to procure fewer silicon wafers
• PDF Solutions and proteanTecs Announce Collaboration to Deliver Combined Solutions for Semiconductor Analytics to Address the Needs of Data Centers and Automotive Makers
• Imagination's IMG DXT GPU unlocks scalable, premium ray tracing for all mobile gamers

Tuesday, January 10, 2023

• €270m for RISC-V chiplets to build European exascale supercomputers

Monday, January 9, 2023

• Capgemini Reinforces Its Focus On Global Industries And Sustainability Services With Top Leadership Appointments
• Nvidia, Intel team up on energy efficient AI server
• Quad-core Risc-V development board with 3D GPU in Pico-ITX
• IntelÂ’s Process Progress
• Samsung Foundry Achieves "Perfect Level" 3nm Yield Rates, Levelling up to TSMC
• Semiconductor and Embedded Systems Architecture Labs (SEAL) makes new technology available to everyone for learning and innovation
• Arteris Acquires Semifore to Accelerate System-on-Chip Development
• RISC-V SBC VisionFive 2 Officially Shipped
• TSMC December 2022 Revenue Report
• Tachyum Closes DDR5 Timing at over 6400MT/s Providing Massive Bandwidth for Prodigy Chip
• Preparing engineering students with technology skills for the industrial world
• Global Semiconductor Sales Decrease 2.9% Month-to-Month in November
• Ceremorphic Introduces Custom Silicon Development for Advanced Nodes Using In-House Technology to Speed Customer HPC Chip Development

Sunday, January 8, 2023

• All the PCIe 5.0 SSDs Coming Out in the Next Year or So
• Supermicro launches Arm-powered servers
• MIPS Rolls Out Its First RISC-V Processor Core – It's a Big 'Un
• CEVA Audio Front End Software Solution Becomes Alexa Voice Service (AVS) Qualified
• Rapid Silicon Announces $30M Series A Round
• CCSDS AR4JA LDPC Encoder and Decoder FEC IP Core Available For Licensing and Implementation from Global IP Core
• Display Port/eDisplay Port v.1.4 Tx-Rx PHY & Controller Silicon Proven IP Cores with high Bandwidth and 4K/8K Resolution is ready for immediate licensing
• Digital Blocks AMBA Peripherals I3C, I2C, eSPI, xSPI Controller IP Core Families Extend Leadership with enhancements containing feature-rich, system-level integration features.