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Thursday, October 13, 2022

• Brite Semiconductor Provides MIPI IP Total Solution

Thursday, October 13, 2022

• Faraday Delivers SAFEâ„¢ IP Portfolio for Samsung Foundry 14LPP Process

Wednesday, October 12, 2022

• Faraday Delivers SAFE™ IP Portfolio for Samsung Foundry 14LPP Process
• Foundries defy chip market downturn
• POLYN Introduces Voice Processing Tiny AI Chip Delivering Industry-First Voice Extraction
• US restricts Sea Turtles in chip industry
• Weebit Nano advances its ReRAM selector development to fit embedded & discrete applications
• Siliconarts signed a Ray-Tracing GPU IP 'Raycore' license agreement with Verisilicon.
• BrainChip Fortifies Neuromorphic Patent Portfolio with New Awards and IP Acquisition
• Alphawave IP Acquires Optical DSP Chip Developer Banias Labs, Advancing its Optical DSP Products for Data Centers
• TCP/IP Hardware Stack IP Core now Available from CAST
• proteanTecs Edge™ Applications Now Available on the Advantest ACS Solution Store

Tuesday, October 11, 2022

• French secure element processor uses RISC-V
• US Government to Fund Expansion of IP Ecosystem for SkyWater's 90 nm Rad-Hard Platform
• New Cadence Certus Delivers Up to 10X Faster Concurrent Full-Chip Optimization and Signoff
• Global 300mm Semiconductor Fab Capacity Projected To Reach New High in 2025, SEMI Reports
• Cadence and Google Cloud Collaborate to Advance the Electronic System and Semiconductor Design Ecosystem
• Achronix Appoints Mahesh Karanth as CFO
• Quadric Appoints Former Cadence VP Dhanendra Jani as New VP of Engineering

Monday, October 10, 2022

• CEA & Schneider Electric Extend R&D Collaboration To Bring Secure and Resilient Digital Solutions To Energy Management and Industrial Automation
• Intel's Road to a Universal Quantum Computer Is Via Chiplets
• 8nm RFIC Flow Supports All Stages of RFIC Design Process
• eFPGA expands the ecosystem footprint one deal at a time
• No Korean Company Included in World's Top 10 in Chip Packaging
• Intel plans 3nm chiplet for satellite terminal
• DCD-SEMI introduces multiprotocol combo: HDLC, UART, SPI... with bigger FIFO and...
• SEMI ESD Alliance Adds Axiomise to Member Roster
• Andes Technology Announces Return of the Annual RISC-V CON on October 18th in the San Jose Airport DoubleTree Hotel
• Tiempo Secure becomes a Strategic Member of RISC-V International

Sunday, October 9, 2022

• Intel Horse Creek platform showcased with SiFive P550 RISC-V CPU, 8GB DDR5, PCIe Gen5
• EnOcean accelerates its growth and breadth of energy-saving solutions through the acquisition of the assets of the edge computing solutions business from Renesas
• TSMC September 2022 Revenue Report
• Introducing PCIe 4.0 PHY IP Cores in 7nm for a reliable, Low area and High-Speed Interface Peripheral slot for all your High-End Devices

Thursday, October 6, 2022

• It's Time to Consider RISC-V
• Creonic Releases DVB-RCS2 Multi-carrier Satellite Receiver IP Core
• Sondrel announces its intention to list on London Stock Exchange's AIM market on 21 October 2022

Wednesday, October 5, 2022

• The Role of Semiconductors in the Renewable Energy Transition
• Arm chops staff
• UMC Reports Sales for September 2022
• No suggestion from Softbank about Samsung investing in Arm, say reports
• GUC Monthly Sales Report - September 2022
• Samsung Electronics Unveils Plans for 1.4nm Process Technology and Investment for Production Capacity at Samsung Foundry Forum 2022
• GBT Filed a Non-Provisional Patent for Automatic Generation of Integrated Circuits Layout Blocks
• Samsung unveils advanced-chipmaking roadmap, intensifying rivalry with TSMC

Tuesday, October 4, 2022

• Perforce Delivers Enhanced Support for Test Automation in Latest Helix ALM Release
• Synopsys Unveils Breakthrough Golden Signoff ECO Solution, Delivering 10x Productivity Improvement
• Credo Introduces Screaming Eagle 112G Retimer DSP with Industry Leading 1.6 Terabit Capacity
• ARM details updated v9 architecture

Monday, October 3, 2022

• SEGGER and Cadence team up to add native J-Link support for Cadence Tensilica cores
• Nobel prize awarded for quantum entanglement
• EuroHPC JU Selects 6 Sites Across the EU for Quantum Computers
• Capgemini fuels collaboration with Panasonic Automotive Systems Company of America through transformative new data platform
• QuickLogic Partners with ChipMotion for eFPGA Implementations in SoC Designs
• Synopsys Expands Code Sight Standard Edition with IntelliJ Support
• Siemens' Aprisa digital implementation solution certified for Samsung Foundry's advanced 4nm processes
• Global Semiconductor Sales Increase 0.1% Year-to-Year in August
• EU chip plan would cost €500bn, says NXP CEO
• Samsung Foundry Certifies Cadence Voltus-XFi Custom Power Integrity Solution for 5LPE Process Technology
• Cadence and Samsung Foundry Collaborate to Certify RFIC Design Reference Flow on 8nm Process Technology

Monday, October 3, 2022

• Vidatronic Unveils OmniPOWERâ„¢ Distributed Power Systems Available for Licensing in FinFET Technologies

Monday, October 3, 2022

• easics launches nearbAIâ„¢ IP cores for XR devices that will set the standard for extreme edge AI performance and immersive experiences

Sunday, October 2, 2022

• Synopsys Unified Platform Tackles Verification Requirements
• SEMIFIVE Announces New 5nm HPC SoC Platform
• Global Fab Equipment Spending Forecast to Reach All-Time High of Nearly $100 Billion in 2022, SEMI Reports
• Synopsys and Samsung Foundry Enable 3nm Process Technology for Power- and Performance-Demanding Mobile, HPC and AI Designs
• Siemens' Calibre platform now certified for Samsung's advanced 3nm process technology
• Mobileye files for IPO, reveals data
• Introducing superfast serial interfacing with JESD204B Tx - Rx PHY IP Cores in 12nm, 28nm and 40nm for all type of ADC/DAC and ASIC/FPGA connections