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Monday, May 22, 2023

• Synopsys Named a Leader in the 2023 Gartner® Magic Quadrant™ for Application Security Testing for Seventh Consecutive Year
• Automotive Industry Looks Beyond EVs for Decarbonization
• Chiplet interconnect handles 40 Gbps/bump
• Sequans Introduces Taurus 5G NR: The World's First Chipset Specifically Optimized for 5G Broadband IoT Devices
• Imagination launches IMG CXM, the smallest GPU to bring effortless user interfaces into homes
• PCI-SIG Certifies VectorPath Accelerator Card for PCIe Gen5 x16 @ 32 GT/s
• Intel Launches Agilex 7 FPGAs with R-Tile, First FPGA with PCIe 5.0 and CXL Capabilities

Sunday, May 21, 2023

• Samsung To Officially Unveil Its 3nm, 4nm Technologies In June, With Up To 34 Percent Power Efficiency Improvements
• Green, Digital Transformation: Infineon Launches EU Projects for Power Electronics and Artificial Intelligence
• Jean-Louis CHAMPSEIX, VP, Head of Corporate Sustainability, highlights " Sustainability has been a guiding principle in STMicroelectronics" and "How Semiconductors Contribute to Green and Low Carbon"
• Arm expands global engineering teams with two new primary sites
• Axelera AI Raises $50M to Democratize Edge AI
• Audio Pioneer xMEMS Announces General Availability of the World's Only All-Silicon, Solid-State Fidelity Micro Speakers
• We don't compete with our customers - TSMC
• Quadric's DevStudio Speeds Software Development with Industry's First Integrated ML + DSP Cloud-Based Code Development Platform
• CEVA and proteanTecs Announce Partnership to Optimize Reliability and Power of Complex SoCs
• Fabless Semiconductor Innovator Stathera Announces US $15M Series A Funding Round
• NVIDIA Grace Drives Wave of New Energy-Efficient Arm Supercomputers
• USB 4.0 Host and Device Controller IP Cores unleashing the Power of High-Speed Connectivity with tunnelling of Display Port and PCIe is now available for Licensing
• Syntiant's Deep Learning Computer Vision Models Deployed on Renesas RZ/V2L Microprocessor
• New £1 billion strategy for UK's semiconductor sector

Thursday, May 18, 2023

• Efabless Announces AI Generated Open-Source Silicon Design Challenge
• K-Best MIMO Decoder IP Core Available For Immediate Integration From Global IP Core

Wednesday, May 17, 2023

• China's semiconductor developers eye shift to RISC-V architecture amid growing chip demand in cars, data centres and AI, executive says
• Arasan Announces immediate availability of its SUREBOOTâ„¢ Total xSPI PHY IP
• SiliconAlly: GigaPHY Testchip is back from Fabrication and Packaging
• proteanTecs' Die-to Die Interconnect Monitoring IP Passes TSMC9000 Pre-Silicon Assessment
• Rambus and Socionext Renew Patent License Agreement
• proteanTecs to Present in Open Compute Project (OCP) Webinar on Silent Data Errors for Resilient Data Centers
• Synopsys Posts Financial Results for Second Quarter Fiscal Year 2023
• Arasan Announces immediate availability of its SUREBOOT™ Total xSPI PHY IP

Tuesday, May 16, 2023

• GlobalFoundries, Samsung Electronics, and TSMC Join Imec's "Sustainable Semiconductor Technologies & Systems" (SSTS) Program
• MIPI DevCon Returns to Silicon Valley to Explore MIPI in Automotive, IoT and Mobile
• Ansys Signs Definitive Agreement to Acquire Diakopto, Expands Multiphysics Simulation Portfolio for Semiconductor Designers
• Semiconductor Manufacturing Monitor Points to Moderating Industry Contraction in Q2 2023, SEMI Reports
• Weebit Nano to present recent ReRAM-based developments at the International Memory Workshop (IMW) 2023
• Transitioning to a Circular Economy for Greener Electronic Systems
• VESA Updates Adaptive-Sync Display Standard with Tighter Specifications
• BrainChip and Teksun Demonstrate Rapid Adoption of AI Solutions at Embedded Vision Summit
• Arasan announces the immediate availability of its 2nd Generation MIPI D-PHY for GlobalFoundries 22nm SoC Designs

Monday, May 15, 2023

• Infineon to lead European research project on Industry 5.0 for more sustainability and resilience in European manufacturing
• Imec teams for US driverless car research lab and incubator
• How Vehicle Design Is Influencing Processors
• NXP and TSMC to Deliver Industry's First Automotive 16 nm FinFET Embedded MRAM
• BrainChip and Quantum Ventura Partner to Develop Cyber Threat Detection

Monday, May 15, 2023

• Andes Technology Announces The New Product Line, AndesAIREâ„¢, Ultimately Efficient AI/ML Solutions For Edge And End-Point Inference

Sunday, May 14, 2023

• Can AI solve its sustainability problem?
• Socionext Conducts Asset Management Demonstration experiment Using ZETA-compliant ZETag® IoT Tags
• AccelerComm secures £21.5m funding to supercharge 5G radio performance
• Indian chip startups get seed funds from Sequoia Capital
• Ethernovia Raises $64 Million to Accelerate the Revolution of Vehicle Networks
• proteanTecs to Present in Open Compute Project (OCP) Webinar on Silent Data Errors for Resilient Data Centers
• Upgrade Your Display and Camera SOC's with proven MIPI C-D Combo PHY and CSI / DSI Controller IP Cores for both Tx and Rx
• Andes Technology Announces The New Product Line, AndesAIRE™, Ultimately Efficient AI/ML Solutions For Edge And End-Point Inference

Thursday, May 11, 2023

• Samsung Electronics Accelerating Foundry Facility Expansion While TSMC Slows Down
• TSMC says new chips to be world's most advanced
• Nordic teams for IoT software SIM
• Perforce survey reveals software has become central to automotive development
• Japanese foundry Rapidus is making cutting edge 2 nm nodes with IBM, plans to compete with TSMC and Samsung by 2027

Wednesday, May 10, 2023

• Canonical enables Ubuntu on StarFive's VisionFive 2 RISC-V single board computer
• Arteris Selected by BOS Semiconductors for Next-Generation Automotive Chips
• Kalray, Arteris, Secure-IC, and Thales, Win the Call for Projects Related to the AI Acceleration Strategy of the "France Relance 2030 - Future Investments" Plan
• BrainChip Showcases Edge AI Technologies at 2023 Embedded Vision Summit
• SMIC Reports 2023 First Quarter Results
• Alphawave Semi Update on Audit Process
• CryoCMOS Consortium develops 4K & 77K transistor models to enable CryoIP development