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Saturday, April 8, 2023

• Semiconductor sustainability: Paving the way for a greener technology industry

Thursday, April 6, 2023

• ARM completes functional safety revamp of microcontrollers with Cortex-M23 update
• Global Semiconductor Sales Decrease 4% Month-to-Month in February

Wednesday, April 5, 2023

• CXL Testing Leverages PCIe Expertise
• ChatGPT leaking Samsung chip secrets is iceberg's tip
• SiPearl: Initial closing of Series A with €90m financing to launch Rhea, the energy-efficient HPC-dedicated microprocessor
• GUC Monthly Sales Report - March 2023
• Post-Quantum Cryptography: Are You Ready?
• Samsung Electronics and AMD Extend Strategic IP Licensing Agreement To Bring AMD Radeonâ„¢ Graphics to Future Mobile Platforms
• Synopsys Accelerates First-Pass Silicon Success for Banias Labs' Networking SoC
• AMD Launches First 5nm ASIC-based Media Accelerator Card to Power New Era of Interactive Media Services at Scale
• intoPIX Partners with Panasonic Connect to Enable new JPEG XS Cameras for Live Video Production
• GUC Taped Out 3nm 8.6Gbps HBM3 and 5Tbps/mm GLink-2.5D IP using TSMC Advanced Packaging Technology
• As Arm Eyes IPO and Higher Prices, RISC-V May Get a Boost

Tuesday, April 4, 2023

• Post-Quantum Cryptography: Are You Ready?
• Capgemini to coordinate next generation IoT project for european commission
• Rapidus, Japan's newly founded chip manufacturer, joins imec's Core Partner Program
• Tiempo Secure appoints IPro as its Sales Representative in Israel
• OPENEDGES' LPDDR5 Memory Subsystem IP Licensed by Aisin for Automotive Application
• Orthogone and Napatech collaborate to deliver state-of-the-art, ultra-low latency FPGA-based SmartNIC platform for high-frequency trading applications
• Rambus and SK hynix Extend Comprehensive License Agreement
• Google extends license agreement for AAC codec range with Fraunhofer IIS

Monday, April 3, 2023

• Synopsys to Showcase Next Gen Polaris Software Integrity Platform at RSA Conference
• Allegro DVT Announces the Industry's First MPEG-5 LCEVC Decoder Silicon IP
• SEMIFIVE Achieves Mass Production Milestone of its SoC Platform
• CEO interview: Paul Wells of SureCore on low power memory and China
• ULTRARAMâ„¢ universal computer memory to be commercialised
• Introducing STAGE RACER 2 with intoPIX JPEG XS: The Future of Fiber Transmission for Broadcast Events
• sureCore pushes the SRAM voltage envelope to below 0.5V for the first time
• Sondrel signs EDA license extension with Siemens for three more years

Sunday, April 2, 2023

• Making Formal Verification the New Normal in IoT with Ashish Darbari - Founder, Axiomise | The IoT Podcast
• SynSense closes strategic round to accelerate the development of their high-speed 3D neuromorphic processor DYNAPâ„¢-CNN2
• Vtool appoints Wonderep to be its sales-channel partner in Israel
• The Future of Semi Innovation from Disruptive Memory to Chiplets with Alphawave Semi
• TurboConcept and Lomicro Information Technology today celebrate two years of successful collaboration
• XMOS announces xcore®-voice: the next generation intelligent solution for smart voice applications
• Unleashing the Full Potential of Your Display: eDisplayPort v1.4 PHY and Controller IP Cores are available for licensing for your Robust products

Wednesday, March 29, 2023

• Blue Ocean Smart System Unveils Chiplet-Based Products Powered by VeriSilicon's High-Performance Processors
• CXL Testing Leverages PCIe Expertise
• POLYN Introduces VibroSense, Industry-First Application-Specific Vibration Pre-Processing Chip Design
• Interview: Aart de Geus on AI-driven EDA
• Renesas Expands RISC-V Embedded Processing Portfolio with New Voice-Control ASSP Solution
• Computing Hardware Expert Georgios Konstadinidis Joins proteanTecs Advisory Board

Tuesday, March 28, 2023

• 3D-IC: An Opportunity to Augment India's Semiconductor Ecosystem
• Survey reveals software now central to automotive development
• I hear you NOCing, But Can You Close Timing?
• Veriest Solutions Promotes Dusica Glisic to Vice President of Frontend Engineering
• Synopsys.ai Unveiled as Industry's First Full-Stack, AI-Driven EDA Suite for Chipmakers
• Tachyum To Use UCIe Interconnect Standards In Prodigy 2
• Networking Chip Startup Enfabrica Emerges from Stealth Mode to Solve Scalability and Price-Performance Challenges for AI Growth in Cloud
• Report: Arm proposes change to IP royalty model

Monday, March 27, 2023

• Mobiveil's PSRAM Controller IP Lets SoC Designers Leverage AP Memory's Xccela x8/x16 250 MHz PSRAM Memory
• eMemory and UMC Expand Low-Power Memory Solutions for AIoT and Mobile Markets with 22nm RRAM Qualification