Search News

Monday, March 7, 2022

• Semiconductor Sales Up 27% in January
• Secure-IC in the FT 1000: the sixth annual list of EuropeÂ’s fastest-growing companies
• Next-gen edge AI accelerator SoC in development
• Vidatronic Announces the 5nm FinFET Power Management IP Series for Ultra-Low-Power, System-on-a-Chip (SoC) Integration
• Reshoring Chip Industry Risks Failure With Just More Fabs
• Andes Technology Announces over 10 Billion Cumulative Shipments of Andes-Embedded SoCs and Records All-Time High Annual and Monthly Revenue in 2021
• QuickLogic Announces First Rad-Hard eFPGA IP for SkyWater RH90 Process

Sunday, March 6, 2022

• Renesas expands options with Andes-based RISC-V MPU
• GlobalFoundries Announces Next-Gen Silicon Photonics Solutions
• GlobalFoundries Announces Next Generation in Silicon Photonics Solutions and Collaborates with Industry Leaders to Advance a New Era of More in the Data Center
• Synopsys Extends OptoCompiler Support for New GF Fotonix Platform
• ZeroPoint Technologies signs Memory Encryption contract
• GUC Monthly Sales Report - February 2022
• Flex Logix and the Air Force Research Laboratory Expand their License to Include any Flex Logix Technology for Research and Chip Prototyping in all Available Processes including Radhard
• Ambient Scientific Announces Beta Release of Software Compilers for its Programmable AI Processor GPX-10
• OpenFive and EdgeCortix Collaborate on an AI Accelerator Custom SoC
• sureCore appoints Taiwan Dream Services Company to spearhead its growth into the APAC wearables market
• PCIe 5.0 SerDes PHY and Controller IP Cores for all High-End Serial connect Interfaces in advanced SoCs is available for immediate licensing

Friday, March 4, 2022

• TSMC's enhanced 3nm process node (N3e) to start production a quarter ahead of schedule

Thursday, March 3, 2022

• TSMC joins Intel-led chiplet alliance as founding member
• Agile Analog's Approach to Analog IP Design and Quality — Why "Silicon Proven" is NOT What You Think
• Credo Expands High Performance Seagull Family With Integrated 50Gbps PAM4 VCSEL and EML Drivers
• Arteris Announces Financial Results for the Fourth Quarter and Full Year 2021 and Estimated First Quarter and Full Year 2022 Guidance
• UMC Reports Sales for February 2022
• Global Semiconductor Sales Increase 26.8% Year-to-Year in January

Wednesday, March 2, 2022

• Open standard for RISC-V verification is announced at DVCon
• Graphcore Supercharges IPU with Wafer-on-Wafer
• Codasip steps up its focus on Europe and appoints Till-Vattier as EMEA VP
• oneNav Announces pureL5 GNSS Digital IP Core and Customer Evaluation System - World's First Single Frequency L5 GNSS Receiver
• Leaders in Semiconductors, Packaging, IP Suppliers, Foundries, and Cloud Service Providers Join Forces to Standardize Chiplet Ecosystem
• Microsoft Executive Bobby Yerramilli-Rao Joins GlobalFoundries Board of Directors
• Dolphin Design chooses DEFACTO's SoC Compiler 9.0: a turnkey methodology to reduce project costs and increase team efficiency
• Dolphin Design chooses DEFACTO's SoC Compiler 9.0: a turnkey methodology to reduce project costs and increase team efficiency

Tuesday, March 1, 2022

• How to Mitigate IoT Security Threats in 2022
• CEA and Spectronite develop software radio for spectrally efficient backhaul solutions
• RISC-V AI Chips Are Joining GPU Race for AI Processing
• Small Prime Divisors Attack and Countermeasure against the RSA-OTP Algorithm
• Pankaj Mayor Joins Arteris IP as Executive Vice President of Global Sales
• Khronos Releases Vulkan SC 1.0 Open Standard for Safety-Critical Accelerated Graphics and Compute
• Sondrel explains the 10 steps to model and design a complex SoC
• Semi Industry Capex Forecast to Jump 24% and Reach Over $190 Billion This Year
• Cadence Recognized with TSMC OIP Ecosystem Forum Customers' Choice Award for 3D-IC Design
• Imperas unifies new RISC-V verification ecosystem with RVVI

Monday, February 28, 2022

• AP Memory Partners with Synopsys on Scalable IoT RAM Memory Solutions
• Silex Insight launches DDR encrypter for High-Performing Systems (ASIC/FPGA)
• CEVA Announces Milestone of 100 Million CEVA-powered Cellular IoT Chips Shipped
• CAST and Achronix Expand Partnership to Deliver Secure FPGA Solutions
• Computing-in-Memory Innovator Solves Speech Processing Challenges at the Edge Using Microchip's Analog Embedded SuperFlash Technology
• Renesas Pioneers RISC-V Technology With RZ/Five General-Purpose MPUs Based on 64-Bit RISC-V CPU Core
• Expedera Announces First Production Shipments of Its Deep Learning Accelerator IP in a Consumer Device
• VESA Readies DisplayPort UHBR (Ultra-High Bit Rate) Device Certification and Begins Certification of UHBR Cables
• Arm clears out top management
• Axiomise Celebrates Fourth Anniversary with Executive Appointments, Move to New Office
• intoPIX and Fraunhofer IIS team with Vectis to offer JPEG XS patent pool license

Monday, February 28, 2022

• Synopsys Initiates $200 Million Accelerated Share Repurchase Agreement

Sunday, February 27, 2022

• eFPGA LUTs Will Outship FPGA LUTs Later This Decade
• Samsung Joins Forces with Industry Leaders to Advance 5G vRAN Ecosystem
• Breker Verification Systems Unleashes the SystemUVM Initiative to Empower UVM Engineering
• U.S. Chops Russia's Access to Integrated Circuits
• Imperas announces RISC-V Physical Memory Protection (PMP) Architectural Validation test suite for high quality security applications
• Taking a RISC: Expanding Chip Options
• USB 3.1 Device & Host Controller IP Cores with highly configurable design for Superspeed data transfers in all kinds of advanced SoCs is available for immediate licensing
• CEVA Extends Wi-Fi Portfolio with Wi-Fi 6/6E IP for the Access Point Market
• OIF Members Demonstrate How Interoperability Accelerates Solutions for Today's and Future Global Networks at OFC 2022
• PCI Express VIP from Avery Design Systems Selected by Fungible for Ensuring Compliance, Connectivity in Hyperscale Data Centers
• ZeroPoint Technologies signs Memory Booster contract

Thursday, February 24, 2022

• TSMC R&D Chief: There's Light at the End of the Chip Shortage
• The age of end-to-end 5G networks built on Arm is now

Wednesday, February 23, 2022

• RISC-V AI Chips Will Be Everywhere
• Weebit delivers significant technical and commercial progress in H1 FY22
• Renesas Develops Bluetooth Low Energy RF Transceiver Technologies that Simplify Board Design, Reduce Circuit Size and Increase Power Efficiency
• Codasip's latest RISC-V embedded cores enable AI/ML edge customization
• Cadence Reports Fourth Quarter and Fiscal Year 2021 Financial Results
• Microprocessor Growth Will Slow in 2022 after Cellphone MPU Surge
• UMC announces new 22nm wafer fab in Singapore
• Codasip's latest RISC-V embedded cores enable AI/ML edge customization
• CEVA Streamlines 5G New Radio Modem Design with PentaG2, the Industry's Most Comprehensive 5G Baseband Platform IP for Mobile Broadband and IoT
• Raising the Bar on Autonomous Vehicle Safety
• Cadence and Dassault Systemes Partner to Transform Electronic Systems Development
• Secure-IC Launches a Unique Cybersecurity Lifecycle Management Platform for Connected Objects