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Saturday, November 5, 2022

• TSMC Grants a Sweep of EDA Certifications for New Process Nodes

Friday, November 4, 2022

• Arm Aims to Be at the Center of Increasingly Diverse Datacenter

Thursday, November 3, 2022

• AI needs automated testing, monitoring
• SMIC: The Chinese company at the centre of US-China chip war
• Intel: Our Goal Is to Become Second Largest Foundry by 2030
• NSITEXE develops "DR4100" General Purpose Accelerator for SoC
• Creonic Participates in 6G Research Project Led by Deutsche Telekom

Wednesday, November 2, 2022

• SiFive Awarded TSMC Open Innovation Platform Partner of the Year
• Finding Talent to Run New Fabs Might Be Challenging
• Tony Fadell Joins Arm Board of Directors
• Sondrel appoints Thomas Flynn as VP Sales North America
• QuickLogic Partners with MA Technology to Distribute eFPGA Technology
• SiMa.ai Welcomes Industry Leader Harald Kroeger to Scale its Business in the Automotive Market
• Secure-IC acquires Silex Insight's security business to accelerate its chip-to-cloud plan and develop the next-generation of embedded cybersecurity solutions
• Silicon Creations Named 2022 TSMC OIP Partner of the Year for Analog and Mixed-Signal IP

Tuesday, November 1, 2022

• Synopsys Expands Channel Partner Strategy into Australia and New Zealand
• With its New RISC-V Processors, SiFive Bets on Compute Density
• Andes Technology Unveils The AndesCore® AX60 Series, An Out-Of-Order Superscalar Multicore RISC-V Processor Family
• Bitech Technologies Reports Completion of Its FPGA design and the Launch of Its ASIC Initiatives for Bitcoin Mining
• Siemens expands industry-leading integrated circuit verification portfolio with acquisition of Avery Design Systems
• Delay in Mass Production of New Intel Products a Boon for AMD, Proportion of AMD x86 Server CPUs Forecast to Exceed 22% in 2023, Says TrendForce
• Codasip delivers custom RISC-V processing to SiliconArts ray-tracing GPUs
• Surecore's Low Power Memory Delivers Improved Power Efficiency For BLE-Enabled Devices
• NextNav Announces Acquisition of Nestwave
• CEVA and ASR Micro Celebrate Milestone - 100 Million Wireless IoT Chips Shipped
• Arteris FlexNoC Interconnect Licensed by Microchip Technology for Microcontroller Development
• QuickLogic Announces Changes to its Board of Directors
• Rambus Reports Third Quarter 2022 Financial Results
• BrainChip Appoints Duy-Loan Le to its Board of Directors

Monday, October 31, 2022

• NB IoT Temperature Tracking Sensors for Cold Chain
• SiFive's New High-Performance Processors Offer a Significant Upgrade for Wearable and Consumer Products
• Quadric's New Chimera GPNPU Processor IP Blends NPU and DSP into New Category of Hybrid SoC Processor

Monday, October 31, 2022

• Vidatronic Releases FlexSIMOâ„¢ DC-DC Converter Technology for Highly Efficient Power Delivery in IoT, AR/VR, and Metaverse SoCs

Sunday, October 30, 2022

• Nova Scotia Community College (NSCC) Joins CMC Microsystems
• Weebit qualifies ReRAM for production on 130nm process
• TSMC says no commitment made on 1nm foundry location
• Rambus and Samsung Electronics Extend Comprehensive Agreement
• Intel signs 7 out of top 10 fabless companies, sees 18A test chip
• MIPI DSI and CSI Controllers IP Cores, for your High-Resolution Cameras, Display and Consumer Products, is available for immediate licensing
• EnSilica growth continues with new Bristol ASIC design office
• Floadia Announces MTP IP without extra Mask Available on 55nm
• Monthly Semiconductor Sales Decrease 0.5% Globally in September

Thursday, October 27, 2022

• Xiphera provides versatility and compact footprint with two new SHA-3 IP cores
• Vidatronic Releases FlexSIMO™ DC-DC Converter Technology for Highly Efficient Power Delivery in IoT, AR/VR, and Metaverse SoCs

Thursday, October 27, 2022

• Zynq® UltraScale+â„¢ MPSoC FPGA: REFLEX CES adds a new FPGA version to its Zeus Zynq® UltraScale+â„¢ MPSoC System-on-module

Thursday, October 27, 2022

• GUC GLinkâ„¢ Chip Leverages proteanTecs' Die-to-Die Interconnect Monitoring

Wednesday, October 26, 2022

• Cadence Accelerates RF Design with Delivery of New TSMC N16 mmWave Reference Flow
• SiMa.ai Welcomes New Investor MSD Partners Bringing Total Investment to $187 Million - SiMa.ai extends oversubscribed series B1 funding to $67 Million
• Weebit Nano successfully qualifies its ReRAM module
• Blueshift Memory Awarded Innovate UK Smart Grant to Develop AI Computer Vision Module
• Synopsys, Ansys and Keysight Accelerate 5G/6G SoC Designs with New mmWave Reference Flow for TSMC Process Technology
• TSMC Launches OIP 3DFabric Alliance to Shape the Future of Semiconductor and System Innovations
• Report: TSMC stops work on Chinese AI chip amid sanctions confusion
• Siemens partners with TSMC for 3nm product certifications and other technology milestones
• Zynq® UltraScale+™ MPSoC FPGA: REFLEX CES adds a new FPGA version to its Zeus Zynq® UltraScale+™ MPSoC System-on-module
• Cadence Integrity 3D-IC Platform Certified for TSMC 3DFabric Offerings
• Synopsys Collaborates with TSMC to Unleash System Innovation with Most Comprehensive Multi-Die Design Solutions for TSMC's Advanced Technologies
• Cadence's New Flow Automates Custom/Analog Design Migration on TSMC Advanced Technologies
• GUC GLink™ Chip Leverages proteanTecs' Die-to-Die Interconnect Monitoring

Tuesday, October 25, 2022

• Renesas warns on falling semiconductor markets
• Blueshift to demo high speed memory in RISC-V ASIC for computer vision
• Siemens Tessent Multi Die Automates 2.5D and 3D Chip DFT
• Flex Logix EFLX4K eFPGA IP Core on TSMC 7nm Technology Now Available
• GUC Unveils GLink 2.3LL, The World's Most Powerful D2D Interconnect IP Using 2.5D Technology
• IAR Systems' Functional Safety Certified Development Tools for RISC-V support latest SiFive Automotive Solutions
• Worldwide Silicon Wafer Shipments Set a New Record in Q3 2022, SEMI Reports
• Cadence Digital and Custom/Analog Design Flows Achieve Certification for TSMC's Latest N4P and N3E Processes
• More than 50 members join SOAFEE to enable the software-defined vehicle of the future

Tuesday, October 25, 2022

• USB-IF Announces Publication of New USB4® Specification to Enable USB 80Gbps Performance

Tuesday, October 25, 2022

• Analog Bits to Demonstrate Pinless PLL and Sensor IP in TSMC N4 and N5 Processes at TSMC 2022 North America Open Innovation Platform® Ecosystem Forum