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• Panavision Imaging and Tower Semiconductor Announce Production of World's Fastest Single Port Re-Configurable Linear Image Sensors (Jul. 02, 2009)
  Panavision Imaging and Tower Semiconductor today announced production of Panavision’s family of DLIS-2K re-configurable line scan CMOS image sensors. The DLIS-2K sensors were developed using Tower’s Advanced Photo Diode (APD) pixel process and pixel IP with Panavision’s patented Imager Architecture.
  
  
• SMIC Achieves Silicon Success with High Performance 45-nanometer Process (Jun. 30, 2009)
  SMIC today announced the successful completion of its first 45-nanometer high performance (GP, generic process with high performance) yield lot.
  
  
• SMIC Revises Up Second Quarter 2009 Quarter-on-Quarter Revenue Guidance (Jun. 29, 2009)
  SMIC announces today an upward revision of Q2 revenue guidance for the three months ended June 30, 2009
  
  
• TSMC Enhances 0.13um Family (Jun. 29, 2009)
  The 0.13μm/0.11μm family now includes a slim standard cell, SRAM and I/O with substantial area reduction and the 0.13um process also adopts LD-MOS (5V~20V) on RF platforms to enable analog and power management applications.
  
  
• Tower Semiconductor to Manufacture Next-Generation MRAM from Crocus Technology (Jun. 18, 2009)
  Crocus Technology and Tower Semiconductor today announced an agreement to port Crocus’ MRAM process technology into Tower’s manufacturing environment. In addition to collaborating on the process port, Tower further reaffirmed the value it sees in Crocus’ unique MRAM technology by taking an equity position valued at $1.25 million.
  
  
• NEC Electronics and Toshiba Extend Chip Technology Development Agreements with IBM (Jun. 18, 2009)
  IBM, NEC Electronics and Toshiba announced that NEC and Toshiba have extended technology development agreements with IBM to participate in the development of a 28-nanometer (nm), high-k metal gate (HKMG), low-power chip technology geared for consumer products.
  
  
• TSMC Reports Foundry's First 28 Nanometer Low Power Platform Technology with Fully Functional 64Mb SRAM (Jun. 17, 2009)
  TSMC today announced it has successfully developed the first 28-nanometer (nm) low power technology that continues the scaling trend and extends Silicon Oxynitride (SiON)/poly usage beyond 32 nanometer with a dual/triple gate oxide process.
  
  
• Soitec's 300mm Ultra-Thin SOI Ready to Support Mainstream Ramp Up of Fully Depleted Applications at 22nm Node (Jun. 16, 2009)
  The Soitec Group announced today that its 300mm ultra-thin SOI (UTSOI) wafer platform is qualified and ready to support fully depleted (FD) device applications scheduled on the industry’s CMOS roadmaps for 22nm and beyond.
  
  
• Jazz Semiconductor Achieves ISO/TS 16949 Automotive Quality Management System Certification (Jun. 10, 2009)
  Jazz Semiconductor announced its ISO/TS 16949 certification, the highest international quality standard for the automotive industry.
  
  
• TSMC May 2009 Sales Report (Jun. 10, 2009)
  TSMC today announced its net sales for May 2009: on an unconsolidated basis, sales were approximately NT$24.47 billion, an increase of 12.6 percent over April 2009 and a decrease of 15.6 percent from May 2008.
  
  
• X-FAB Releases First 0.18 Micrometer Foundry Solution for Integrated Hall Sensors (Jun. 10, 2009)
  X-FAB today announced the industry’s first foundry process for the production of integrated Hall sensor ICs in 0.18 micrometer technology. Its 0.18 micrometer low-power CMOS process, known as XH018, allows the combination of Hall sensor elements with high-voltage devices and Non-Volatile Memory (NVM) options.
  
  
• SMIC and CHINGIS Announce Availability of 0.18um Embedded Flash Process Technology and IP Portfolio (Jun. 02, 2009)
  SMIC and Chingis Technology announced today the availability of SMIC's 0.18um embedded flash memory process technology and IP portfolio. SMIC's 0.18um embedded flash process, the product of a close collaboration between a pioneering foundry and an expert in embedded non-volatile memory, is based on the third generation of Chingis's patented 2T PMOS flash (pFLASH(TM)) architecture, and is fully qualified and ready for mass production.
  
  
• TSMC Launches Unified Interconnect Modeling Format for Advanced Process Technologies (May. 27, 2009)
  TSMC today unveiled iRCX, an interoperable electronic design automation (EDA) data format, for TSMC 65 nanometer (nm) and 40nm technologies. iRCX format unifies interconnect modeling data delivery, ensures data integrity and interpretation. EDA tools which support iRCX format will be able to receive accurate interconnect modeling data from the iRCX files developed and supported by TSMC.
  
  
• Jazz Semiconductor's DIRECT Multiproject Wafer (MPW) Shuttle Program Enables Rapid Design Verification and Faster Time-to-Market (May. 27, 2009)
  Jazz Semiconductor today announced its DIRECT Multiproject Wafer (MPW) shuttle program offering customers quick and low-cost prototyping with access to high performance processes. The program provides a vehicle to develop new designs in CMOS, SiGe and SOI and bring these to market quickly, without incurring the full cost of a complete mask set.
  
  
• SMIC Announces Availability of 65-nanometer Low Leakage Process IP Portfolio (May. 15, 2009)
  SMIC announced today the availability of a set of 65-nanometer low leakage process IPs, including the preliminary version release of six memory compliers. This portfolio, which contains a number of new, ready-to-use IPs, follows the 65nm standard cell libraries that were released earlier this year.
  
  
• Fujitsu Microelectronics and TSMC to Collaborate on Leading-edge Process Technology (Apr. 30, 2009)
  Fujitsu Microelectronics and TSMC today announced that they will collaborate on leading-edge process technology production for the manufacturing of Fujitsu Microelectronics’ products. Under an agreement between the companies, Fujitsu Microelectronics will expand its 40-nanometer generation logic IC business with production at TSMC’s fabs.
  
  
• TSMC Launches Integrated Sign-Off Flow To Shorten Design Cycle, Enhance Tape-Out Quality (Apr. 21, 2009)
  The new flow is available now for 65nm designs. Integrated Sign-Off Flow is an automated RTL to GDSII chip implementation flow that tightly integrates all process-specific items including pre-qualified library and IP, selected EDA tools, production-quality flow, advanced design methodology, and TSMC foundry technology files that have been proven and refined over hundreds of applications.
  
  
• TSMC Announces Foundry's First Mixed Signal/RF Reference Design Kit (Apr. 21, 2009)
  Taiwan Semiconductor Manufacturing Company, Ltd. today unveiled the foundry industry's first Mixed Signal/Radio Frequency Reference Design Kit (MS/RF RDK). The new RDK helps resolve the long-standing challenge of full chip verification of SoCs with both analog, mixed signal and digital content. It enables a top-down MS/RF design methodology and a system-level simulation flow to reduce design cycle time and encourage IP reuse.
  
  
• IBM Technology Alliance Announces Availability of Advanced 28-Nanometer, Low-Power Semiconductor Technology (Apr. 16, 2009)
  IBM, Chartered, GLOBALFOUNDRIES, Infineon, Samsung and STMicroelectronics have defined and are jointly developing a 28-nanometer (nm), high-k metal gate (HKMG), low-power bulk complementary metal oxide semiconductor (CMOS) process technology.
  
  
• TSMC March 2009 Sales Report (Apr. 10, 2009)
  TSMC today announced its net sales for March 2009: on an unconsolidated basis, sales were approximately NT$13.62 billion, an increase of 18.4 percent over February 2009 and a decrease of 48.7 percent from March 2008.
  
  
• UMC Delivers Customer ICs Produced on its High Performance 40nm Logic Technology (Apr. 08, 2009)
  UMC today announced that it has delivered customer ICs produced on its High Performance (HP) 40nm process technology. The products were manufactured with excellent cycle time and yields for the large die-size programmable logic chips, which leveraged the foundry's triple-gate oxide, 12 metal layers and copper/low-k technology to enable 65% reduced power consumption and more than twice the density improvement over previous 65nm generation products.
  
  
• TSMC Qualifies New 0.18-Micron Embedded Flash Family (Mar. 31, 2009)
  TSMC today announced that it has qualified its new 0.18-micron embedded flash (embFlash) process technology family that targets a wide range of applications. The new family includes a baseline 1.8 to 5 volt standard process, an ultra-low leakage process, and specific automotive-qualified embedded Flash IP.
  
  
• SilTerra Ready For 110nm CMOS Logic Technology Pilot Production (Mar. 25, 2009)
  SilTerra has officially debut the industry foundry compatible copper-based 110nm CMOS Logic Technology as the 10% optical shrink for it's copper-based 130nm CMOS Logic Technology, which has been in mass production for more than 2 years.
  
  
• Ciranova and TSMC Announce Strategic Partnership on Advanced PDK Technology (Mar. 24, 2009)
  TSMC and Ciranova announced a multi-year strategic partnership to collaborate on the development of advanced Process Design Kit (PDK) technology based on Ciranova’s PyCell architecture. The results of the collaboration, targeted at 65nm process technology and below, will be an integral part of TSMC’s interoperable PDK development roadmap.
  
  
• TSMC Announces February 2009 Sales Report and Revises First-Quarter Business Guidance (Mar. 10, 2009)
  TSMC today announced its net sales for February 2009: on an unconsolidated basis, sales were approximately NT$11.50 billion, a decrease of 7.5 percent from January 2009 and a decrease of 59.5 percent from February 2008.
  
  
• Chartered Updates Guidance for First Quarter (Mar. 09, 2009)
  Today, in a mid-quarter update, Chartered Semiconductor revised its first quarter 2009 guidance, which was originally provided on January 30, 2009.
  
  
• Intel, TSMC Reach Agreement to Collaborate on Technology Platform, IP Infrastructure, SoC Solutions (Mar. 02, 2009)
  Intel Corporation and TSMC today announced a memorandum of understanding (MOU) to collaborate on addressing technology platform, intellectual property (IP) infrastructure, and System-on-Chip (SoC) solutions. Under the MOU, Intel would port its Atom processor CPU cores to the TSMC technology platform including processes, IP, libraries, and design flows. The collaboration is intended to expand Intel’s Atom SoCs availability for Intel customers for a wider range of applications through integration with TSMC’s diverse IP infrastructure.
  
  
• Tower Semiconductor Reports Fourth Quarter and Fiscal Year 2008 Financial Results (Feb. 19, 2009)
  Record annual revenue of $251.7 million, representing year-over-year growth of 9 percent; EBITDA of $36 million and positive annual cash flow from operations
  
  
• Lime Microsystems selects Jazz Semiconductor's 0.18-micron SiGe process for its Configurable Multi-band, Multi-standard Transceiver Targeting WCDMA, CDMA, LTE and WiMAX Femtocells (Feb. 18, 2009)
  Lime Microsystems’ proprietary technology combined with Jazz Semiconductor’s 0.18-micron SiGe BiCMOS process has enabled the development of a single-chip multi-band, multi-standard broadband transceiver IC with outstanding RF performance.
  
  
• Tower Semiconductor and Triune Systems to Collaborate on Power Management Platform (Feb. 11, 2009)
  Through this collaboration, the companies will design and develop intellectual property (IP) for Tower’s 0.18-micron Bipolar-CMOS-DMOS (BCD) process to deliver a family of low and high voltage power management products and IP for a variety of applications to enable faster design cycles and lower cost designs.