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D&R Industry Articles
Articles for the Week of November 27, 2023
Additional Articles- Optimizing Electronics Design With AI Co-Pilots
- Revolutionizing High-Voltage Controller Chips for Electric Vehicles
Articles for the Week of November 20, 2023
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Hardware-Assisted Verification: Ideal Foundation for RISC-V Adoption
HAV is becoming an enabler for the emerging ecosystem based on its ability to run many cycles of software-driven validation.Articles for the Week of November 13, 2023
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Menta eFPGA IP for Edge AI
The paper is divided into two main sections: the first one deals with AI algorithms, with a particular focus on Artificial Neural Networks (ANNs), which are widely acknowledged as the most commonly employed techniques in the field. The second part of the paper shifts its focus to their hardware implementation, where three distinct hardware categories are evaluated: general-purpose processors, specialized AI chips, and programmable systems.Articles for the Week of November 6, 2023
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Inside HDR10: A technical exploration of High Dynamic Range
High Dynamic Range (HDR) technology has taken the world of visual entertainment, especially streaming media solutions, by storm. It's the secret sauce that makes images and videos look incredibly lifelike and captivating. From the vibrant colors in your favourite movies to the dazzling graphics in video games, HDR has revolutionized how we perceive visuals on screens.Articles for the Week of October 30, 2023
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Writing a modular Audio Post Processing DSP algorithm
The objective of this paper is to provide a high-level process of designing and implementing an Audio Algorithm, specifically written for Soc’s multi-core, low-power audio processing DSP processors. These algorithms can be optimized for a specific DSP processor and offload its processing on the DSP to lower the power consumption of a SoC.- Parsing the Mindboggling Cost of Ownership of Generative AI
- Adopting IEC 62443 standards for infrastructure cybersecurity
Articles for the Week of October 23, 2023
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Streamlining SoC Integration With the Power of Automation
The rapid acceleration of semiconductor technologies is creating system-on-chip (SoC) devices that are increasingly complex. These chips contain billions of transistors and hundreds of functional intellectual property (IP) blocks.Articles for the Week of October 16, 2023
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Exploring Machine Learning testing and its tools and frameworks
Developing an ML model is not a one-time process. It requires continuous improvement to ensure reliable and accurate predictions. This is where ML testing plays a critical role as we are seeing massive growth in the global artificial intelligence and machine learning market.Articles for the Week of October 9, 2023
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Understanding Timing Correlation Between Sign-off Tool and Circuit Simulation
This article presents Timing Correlation Analysis between the sign-off tool and HSPICE for the design of a 5nm technology node. We will explore several types of Timing Correlation Analysis and define the accuracy of libraries based on the correlation results.Articles for the Week of October 2, 2023
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The Challenge of Automotive Hardware Security Deployment
A complete reinvention of the automotive industry is currently underway. Autonomous driving, connected vehicles, and the electrification of the powertrain all represent a once-in-a-generation shift in the manufacturing process.Articles for the Week of September 25, 2023
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Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
The objective of this paper is to illustrate congestion, shorts, and practical approaches to fix both issues at lower/higher technology nodes. This paper also includes PnR tool (ICC2) related commands and their uses to overcome the mentioned issues.- High Speed, Low Power and Flexibility Drive DisplayPort's Increasing Popularity
- Artificial Intelligence (AI) utilizing deep learning techniques to enhance ADAS
Articles for the Week of September 18, 2023
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Accelerating RISC-V development with network-on-chip IP
In the world of system-on-chip (SoC) devices, architects encounter many options when configuring the processor subsystem. Choices range from single processor cores to clusters to multiple core clusters that are predominantly heterogeneous but occasionally homogeneous.- Off-the-Shelf Chiplets Open New Market Opportunities
- A comprehensive approach to enhancing IoT Security with Artificial Intelligence
- Efficient FIR filtering with Bit Layer Multiply Accumulator
- The benefit of non-volatile memory (NVM) for edge AI
- What This Year May Well Bring for the eFPGA
Articles for the Week of September 11, 2023
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I2C Interface Timing Specifications and Constraints
This paper covers the timing specification of I2C (Inter-Integrated Circuit) bus protocol. We have described all the timing specifications and how they are achieved by constraining our design. This paper focuses on the timing constraints for fast mode plus (The data transfer rate is 1 Mbit/s).Articles for the Week of September 4, 2023
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Handling the Challenges of Building HPC Systems We Need
What is the secret of humanity’s success? What has given us the ability to build wonders, such as Stonehenge in England, the Pyramids of Egypt and the Great Wall of China? Humans are small, weak and slow compared with many other animals.Articles for the Week of August 28, 2023
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Importance of VLSI Design Verification and its Methodologies
In this article, we will explore the concept of design verification, its importance, the process involved, the languages and methodologies used, and the future prospects of this critical phase in the development of VLSI design.