D&R Industry Articles

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The evolution of embedded devices: Addressing complex design challenges

We expect our devices to be smart, upgradable and accessible over the Internet and security is no longer optional. Existing standards and stack libraries can help developers complete a project in a timely, secure way. This article outlines the key design challenges an embedded developer faces today, and some of the new technologies that will help designers address these challenges.

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Transactor vs CPU in SoC Verification

The objective of this paper is to explain the advantages of using CPU at SoC level instead of transactor. This paper puts forward few examples for understanding the differences.

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Optimizing AI and Machine Learning with eFPGAs

Why the performance and flexibility offered by eFPGA is turning out to be a game changer for anyone designing AI and machine learning and struggling to meet the compute demands.

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Fundamentals of Semiconductor ISO 26262 Certification: People, Process and Product

This paper explains the changes in the role of the semiconductor industry in the automotive supply chain and seeks to enhance the reader’s knowledge regarding all aspects of the ISO 26262 standard. This paper also discusses the standard’s applicability not only to electronic products, but also to the people and processes employed to create them.

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Switch Abstraction Interface (SAI) - Breaking the Network Aggregation

The networking industry is moving faster than ever before. The reason to expedite the pace lies in the network device disaggregation which leads to the evolution of the white box switch concept. What enables the network disaggregation? What are the problems with traditional networking? Let us look at it in the discourse ahead.

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Usage of Multibit Flip-Flop and its Challenges in ASIC Physical Design

The continuous need for reduced size of the chip in the VLSI industry brings exciting challenges to the layout engineers for designing better and high-performing integrated circuits, which needs to consume low power even while reducing the silicon area and cost involved. Internal power is a component of the total power consumed by the chip, which is becoming more challenging to handle with the shrinking technology nodes.