D&R Industry Articles

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PUFiot: An Essential Secure Coprocessor for RISC-V

While the security guidelines of RISC-V are still under development, providing RISC-V users with an effective plug-and-play solution to strengthen the security of SoCs and beyond is critical. What kind of designs are needed to secure IoT applications?

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How PUF-based RoT Can Solve IoT Security Issues

The security issues surrounding the internet of things (IoT) devices range from tiny semiconductors to global supply chains.

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eNVM towards 40nm and beyond

As the semiconductor industry is prominently marching into the nanometer era, fundamental elements face their physical limits significantly, such as electric field across gate dielectric layers, leakage from an ultra-short channel or steep doping profile, newly incorporated leakage/current models, etc.

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EDA in the Cloud Will be Key to Rapid Innovative SoC Design

In the electronic design automation (EDA) space, until recently, traditional concerns about security, protecting intellectual property (IP) and data outweighed the significant advantages offered by computing in the cloud — such as flexibility, scalability and productivity.

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FPGAs - The Logical Solution to the Microcontroller Shortage

Today’s marketplace is getting heavily disrupted by the current semiconductor chip shortage that has hampered our manufacturing production lines. This is evident by the limited supply of products available.

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The Elements of Traceability

Europe is an interesting place to observe complex systems’ development activity. It may not have hyperscalers or smartphone leaders, but on the world stage, it has one of the two dominant commercial aircraft manufacturers, an active space agency, several premium car brands and leading Tier 1s with supporting automotive semiconductor companies.

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Advanced driver-assistance systems (ADAS)

In this article, we have discussed about the structure of the ADAS Model which we have created by using VisualSim software. The model is built with 4 raders, 6 cameras, and 2 Lidars connected to 12 ECUs, gateways and IEE802.1Q networks. The prototype is set up to quickly modify feature packages and hardware distribution to determine hardware and network configuration. The simulated output and the related plots has also been discussed in depth.