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Process Node	5nm 7nm 8nm 10nm 12nm 16nm 20nm 22nm 28nm 40nm 55nm 65nm 90nm 130nm 150nm 180nm 250nm
Foundry	GLOBALFOUNDRIES HHGrace IBM LFoundry Renesas Samsung SilTerra SMIC Tower TSMC UMC X-FAB

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APEX 20KC APEX 20KE APEX II Arria 10 Arria GX Arria II GX Arria II GZ Arria V GT Arria V GX Arria V GZ Arria V ST Arria V SX Cyclone Cyclone II Cyclone III Cyclone III LS Cyclone IV GX Cyclone V GT Cyclone V GX Cyclone V SE Cyclone V ST Cyclone V SX HardCopy HardCopy II HardCopy III HardCopy IV E HardCopy IV GX MAX 10 MAX II MAX V Stratix Stratix 10 Stratix GX Stratix II Stratix II GX Stratix III Stratix III E Stratix IV Stratix IV GT Stratix IV GX Stratix V E Stratix V GS Stratix V GT Stratix V GX	Artix-7 Artix-7 -2L Kintex UltraScale Kintex UltraScale+ Kintex-7 Kintex-7 -2L Spartan-3 Spartan-3 XA Spartan-3A Spartan-3A DSP Spartan-3A DSP XA Spartan-3A XA Spartan-3AN Spartan-3E Spartan-3E XA Spartan-6 Spartan-6 -1L Spartan-6 HXT Spartan-6 LX Spartan-6 LXT Spartan-6 XA Spartan-6 XC Spartan-7 Spartan-II Spartan-IIE UltraScale UltraScale+ Virtex UltraScale Virtex UltraScale+ Virtex-4 Virtex-4 FX Virtex-4 LX Virtex-4 SX Virtex-4 XA Virtex-5 Virtex-5 FX Virtex-5 FXT Virtex-5 LX Virtex-5 LXT Virtex-5 SX Virtex-5 SXT Virtex-5 TXT Virtex-6 Virtex-6 -1L Virtex-6 CXT Virtex-6 HXT Virtex-6 LX Virtex-6 LXT Virtex-6 SXT Virtex-6 XC Virtex-7 Virtex-7 -2G Virtex-7 -2L Virtex-7 HT Virtex-7 XT Virtex-7T Virtex-E Virtex-II Virtex-II Pro Zynq UltraScale+ MPSoC Zynq-7000	ispClock ispMACH 4000 LatticeEC/ECP LatticeECP2 LatticeECP2M LatticeECP3 LatticeECP5 LatticeSC LatticeSCM LatticeXP LatticeXP2 MachXO MachXO2 MachXO3 Platform Manager Power Manager II

New Silicon IP

• Low-Latency 10/100/1000 Ethernet MAC

  • Supports IEEE 802.3
  • Enables high-precision syn-chronization in TSN networks
  
   
  
  

• Digital and mixed-signal IP and ASIC RISC-V reference design for USB Type-C/PD power adapter/charger

  • RISC-V RV32EC processor subsystem with debug module, JTAG debug transport, and instruction and data ROM and SRAMs
  
   
  
  

• DesignWare CXL Controller IP

  • Fully supports the CXL 1.0 and 1.1 specifications
  • Supports PCI Express 5.0 mode with 32 GT/s and x16 link width
  
   
  
  

• 12-Bit 400MS/s Current Steering DAC

  • TowerJazz 0.18μm TS18 Standard Logic Process
  • 3.3V and 1.8V Supplies
  • Sampling Rate up to 400MS/
  
   
  
  

• Wi-Fi WPA3 MAC

  • Legacy security system
  • WPA/WPA2 security system (IEEE 802.11i)
  • Protection of Management Frames (IEEE 802.11w)
  
   
  
  

• Crypto Coprocessor

  • Scalable architecture and crypto engines for optimal performance/resource usage
  • Configurable for perfect application fit
  
   
  
  

• CAN-to-TSN Ethernet Gateway/Bridge

  • Enables bidirectional communication between up to seven CAN ports and one Ether-net port
  • UDP Encapsulation of CAN messages
  
   
  
  

• tRoot Hardware Secure Module with ARC SEM Security Processor

  • Efficient ARC SEM Security Processor
  • SoC host and peripheral interfaces
  • APEX cryptography acceleration (CryptoPack)
  
   
  
  

• 12-bit 400MS/s DAC

  • TSMC 28nm HPC+, 7 Metals Used
  • 2.5V and 0.9V Supplies
  • Sampling Rate up to 400MS/s
  
   
  
  

• Display controller for dual-display

  • Scan directions: 90/180/270° rotation, horizontal/vertical flip
  • Multiple layers (alpha blend) with configurable mapping
  
   
  
  

• Samsung Security System - ADAS (71804)

  • Isolated Execution Environment (IEE)
  • Cryptographic Function
  • Secure Key Management
  
   
  
  

• 10/100/100 Ethernet PHY

  • TSMC CLN90G
  • Operating voltage range: 2.25V ~ 3.63V
  • Operating junction temperature range: -40℃ ~ 125℃
  
   
  
  

Top Silicon IP

• 1

  Neural Network Processor for Intelligent Vision, Voice, Natural Language Processing

  • Highly efficent neural network inference processor
  • Scalable performance from less than 1 TOPS to 100s of TOPS
  
   
  
  
• 2

  I3C Slave Controller, SCL Clock only, Configure User Registers, no CPU Host Required

  • I3C Slave Controller - Implements Slave-only protocol for smaller VLSI footprint, for applications requiring Slave–Receiver and Slave–Transmitter capability
  
   
  
  
• 3

  DDR4 Controller

  • Compliant with DDR4 protocol standard JESD79-4B specification.
  • Supports up to 16GB device density.
  • Supports X4,X8 and X16 devices.
  
   
  
  

• 4

  xSPI NOR Flash controller

  • Memory mapped access to the connected flash devices
  • Continuous Burst transfer support
  • Auto boot support
  
   
  
  
• 5

  Low latency Network TAP IP-Core for full duplex 100M/1G Ethernet links

  • Non-intrusive,
  • Support 100% full-duplex traffic
  • low end-to-end latency inferior to 1 us
  
   
  
  
• 6

  Samsung Security System - ADAS (71804)

  • Isolated Execution Environment (IEE)
  • Cryptographic Function
  • Secure Key Management
  
   
  
  

• 7

  Display controller for dual-display

  • Scan directions: 90/180/270° rotation, horizontal/vertical flip
  • Multiple layers (alpha blend) with configurable mapping
  
   
  
  
• 8

  HBM2e PHY IP in TSMC 7FF

  • Supports 2.5D-based JEDEC standard HBM2/HBM2E SDRAMs with data ratesup to 3200 Mbps
  • 8 independent memory channels (e.g.,1024 bits)
  
   
  
  
• 9

  Fractional-N Frequency Synthesizer PLL (5nm - 180nm)

  • 1MHz up to 1.6GHz input frequency range
  • 1MHz up to 3.6GHz output frequency range
  • 24 bit fractional resolution
  
   
  
  

• 10

  Accurate Low Noise Temperature Sensor

  • TSMC 180nm
  • 1.8V and 3.3V Power Supply
  • Temperature Range of 0ºC to +70ºC
  
   
  
  
• 11

  Deep neural-network accelerator (DNA) AI processor

  • Specialized design to take advantage of sparsity in weights and activations for compute and bandwidth reduction
  
   
  
  
• 12

  Automotive Ethernet MAC IP

  • IEEE 802.3 compliant, UNH tested and ISO 26262 ASIL-B qualified
  • Enhanced active functional safety features
  
   
  
  

¹ Top Silicon IP Over the Last Two Weeks (Last update: Sep. 15)

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