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Process Node	5nm 7nm 8nm 10nm 12nm 16nm 20nm 22nm 28nm 40nm 55nm 65nm 90nm 130nm 150nm 180nm 250nm
Foundry	GLOBALFOUNDRIES HHGrace IBM LFoundry Renesas Samsung SilTerra SMIC Tower TSMC UMC X-FAB

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APEX 20KC APEX 20KE APEX II Arria 10 Arria GX Arria II GX Arria II GZ Arria V GT Arria V GX Arria V GZ Arria V ST Arria V SX Cyclone Cyclone II Cyclone III Cyclone III LS Cyclone IV GX Cyclone V GT Cyclone V GX Cyclone V SE Cyclone V ST Cyclone V SX HardCopy HardCopy II HardCopy III HardCopy IV E HardCopy IV GX MAX 10 MAX II MAX V Stratix Stratix 10 Stratix GX Stratix II Stratix II GX Stratix III Stratix III E Stratix IV Stratix IV GT Stratix IV GX Stratix V E Stratix V GS Stratix V GT Stratix V GX	Artix-7 Artix-7 -2L Kintex UltraScale Kintex UltraScale+ Kintex-7 Kintex-7 -2L Spartan-3 Spartan-3 XA Spartan-3A Spartan-3A DSP Spartan-3A DSP XA Spartan-3A XA Spartan-3AN Spartan-3E Spartan-3E XA Spartan-6 Spartan-6 -1L Spartan-6 HXT Spartan-6 LX Spartan-6 LXT Spartan-6 XA Spartan-6 XC Spartan-7 Spartan-II Spartan-IIE UltraScale UltraScale+ Virtex UltraScale Virtex UltraScale+ Virtex-4 Virtex-4 FX Virtex-4 LX Virtex-4 SX Virtex-4 XA Virtex-5 Virtex-5 FX Virtex-5 FXT Virtex-5 LX Virtex-5 LXT Virtex-5 SX Virtex-5 SXT Virtex-5 TXT Virtex-6 Virtex-6 -1L Virtex-6 CXT Virtex-6 HXT Virtex-6 LX Virtex-6 LXT Virtex-6 SXT Virtex-6 XC Virtex-7 Virtex-7 -2G Virtex-7 -2L Virtex-7 HT Virtex-7 XT Virtex-7T Virtex-E Virtex-II Virtex-II Pro Zynq UltraScale+ MPSoC Zynq-7000	ispClock ispMACH 4000 LatticeEC/ECP LatticeECP2 LatticeECP2M LatticeECP3 LatticeECP5 LatticeSC LatticeSCM LatticeXP LatticeXP2 MachXO MachXO2 MachXO3 Platform Manager Power Manager II

New Silicon IP

• 1-112Gbps Long-Reach (LR) Multi-Standard-Serdes (MSS)

  • High speed A/D
  • Sub-sampling clock multiplier
  • Master controller
  
   
  
  

• Hardware RTP Stack for H.264 Stream Decapsulation

  • RTP Decapsulation for H.264 NAL Streams
  • Easier Integration For Faster Development
  
   
  
  

• Low Power Clock Multiplier PLL for 40nm TSMC ULP CMOS

  • Wide range M, P, and N integer dividers.
  • 40MHz – 600MHz output frequency range.
  • Input frequency range 1.4MHz – 32MHz.
  
   
  
  

• 8-Channel Comparator with Programmable Thresholds

  • 90nm TSMC Logic LP Process, 6 Metals Used
  • 1.2V and 3.3V Power Supplies
  • 8-Bit Voltage DAC resolution
  
   
  
  

• Dual-channel Programmable CT ΔƩ I/Q AD converter

  • 5 GSPS Internal Sampling Rate
  • 20-300 MHz Full Performance Bandwidths
  • 2.0Vpp Full Scale Range
  
   
  
  

• Ultra Compact 32-bit RISC-V CPU Core

  • AndeStarâ„¢ V5/V5e Instruction Set Architecture (ISA)
  • Compliant to RISC-V technology
  • Support RV32IMAC/EMAC
  
   
  
  

• 10M/100M/1G/2.5G Ethernet TSN MAC

  • Delivers Performance
  • Highly Configurable
  • Feature Rich
  • Silicon Agnostic
  
   
  
  

• Safe and Secure CAN bus IP

  • Bosch CAN protocol compliant, DO254 DAL A Certifiable
  • Real-time Cyber Resilience IDS/IPS Features
  • Monitor CAN Bus Circuit Failures During Active Transmission
  
   
  
  

• Enhanced Security Package option for ARC HS cores

  • Two privilege levels and MPU-based access control
  • Data and instruction path integrity checking to prevent fault injection attacks
  
   
  
  

• Low Drop Out 200mA Regulator with External Capacitor

  • 22FDX - 22nm GlobalFoundries Process, 9 Metals Used
  • 1.8V Power Supply Voltage
  • 0.8V Input Voltage
  
   
  
  

• LPDDR5/4/4X PHY for TSMC N7

  • Lowest latency for data-intensive applications
  • Highest data rates with detailed system guidelines
  
   
  
  

• 24-bit Sigma Delta Stereo Audio DAC in TSMC 28nm

  • 24-bit stereo audio DAC
  • Audio interface is serial i2s
  • Sampling frequency 48KHz
  
   
  
  

Top Silicon IP

• 1

  Deep Learning Processor

  • Configurable hardware architecture
  • Configurable core number up to three
  • Convolution and deconvolution
  
   
  
  
• 2

  32 Gbps Multi-protocol SerDes PHY

  • Multi-protocol PHYs supporting data rate in the range of 2.5 Gbps – 32 Gbps
  • Available in GLOBALFOUNDRIES 22FDX® process node
  
   
  
  
• 3

  MIPI D-PHY / C-PHY Combo IP for TSMC 22nm

  • Compliant to MIPI Alliance Standard for C-PHY specification Version 1.2
  • Compliant to MIPI Alliance Standard for D-PHY specification Version 1.2
  
   
  
  

• 4

  Dual-CORE HEVC+H.264 combined codec for 8Kp60

  • HEVC - Main/Main 10 Profile, Level 5.2 High-tier
  • H.264 - High/High 10 Profile, Level 6.0
  
   
  
  
• 5

  Dual 12-bit 2-GS/s Analog Front-End in 28nm

  • TSMC 28nm HPC+
  • Dual 12-bit 2GS/s ADC
  • Dual 12-bit 2GS/s DAC
  
   
  
  
• 6

  High-Performance FPGA-based Engine for Deep Neural Networks

  • Faster than any alternative DNN running on an equivalent FPGA.
  • Out-performs GPUs for a given power or cost budget.
  
   
  
  

• 7

  Multi-Protocol 25G PHY IP in TSMC N7

  • Supports 1.25 to 25.8 Gbps data-rate
  • Supports PCI Express 4.0 with lane margining, 1G to 100G Ethernet, CCIX, and SATA protocols
  
   
  
  
• 8

  ULP 10MHz Clock-Generator

  • GLOBALFOUNDRIES 22FDX
  • 10 MHz, 5µW
  • Flexible reference input clock from 32kHz to 1 MHz
  
   
  
  
• 9

  Software-Compatible DSPs For Radar, Lidar and 5G Applications

  • Single-instruction, multiple-data (SIMD) vector processing
  • Up to 5-issue very long instruction word (VLIW) for parallel load/store, MAC, and ALU ops
  
   
  
  

• 10

  NB-IOT Transceiver RF Front-end

  • -110 dBm Rx Sensitivity
  • <3 dB Noise Figure
  • +100 dB Rx Gain
  
   
  
  
• 11

  Power-on-Reset and Supply Monitoring

  • TSMC 40nm Logic LP Process
  • Power-on Reset output
  • Early Warning output
  
   
  
  
• 12

  DesignWare MIPI M-PHY IP for TSMC 16FFC

  • Compliant with MIPI M-PHY v4.1 specification
  • Supports MIPI LLI, UniPro, JEDEC UFS protocols
  • Supports High-Speed (HS) Gear1, Gear2, Gear3 A/B, and Gear 4 A/B modes
  
   
  
  

¹ Top Silicon IP Over the Last Two Weeks (Last update: Mar. 17)

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