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ASIL B Ready PCIe 5.0 Integrity and Data Encryption (IDE) Security IP

• Compliant with PCI Express IDE specification
• High-performance AES-GCM based packet encryption, decryption, authentication

2-stage Power Amplifier 39GHz ultra-efficient Dual-Drive™ PA

• Best in class efficiency
• Plug and play
• Frequency and process agnostic

JESD204D Transmitter and Receiver IP

• Designed according to JEDEC JESD204D Standard.
• Supports up to 24 lanes per IP cores.

Securyzr™ neo Core Platform - One core, multiple products

• Secure Boot
• Firmware update in the field
• Secure key storage

MIPI I3C Controller and Target fully featured IP solution

• Fully compliant with MIPI I3C v1.1.1 Specification
• TCRI v1.0 Compliant

Centralized Network Configurator (CNC) for TSN nodes such as endpoints and Switches

• Read static topology from YANG compliant custom XML file
• Read dynamic Traffic Provision Request (TPR) from IEEE 802.1Qdj YANG compliant file

Remote Temperature Sensor

• 4nm CMOS device technology
• Dual power supply: 1.2V±10%, 0.75V±10%
• Operating junction temperature(Tj): -40℃ to125℃

Ultra Low Power AI core

• Ultra-low standalone NPU core uW to mW active power
• Supports power islands for minimal standby power

PCIe 6.0 PHY IP for TSMC N5

• Physical Coding Sublayer (PCS) block with PIPE interface
• Supports PCIe 6.0, encoding, backchannel initialization

Low jitter, ultra-low power (<950uW) ring-oscillator-based PLL-2.4GHz

• Ultra-low jitter (less than 1ps rms jitter)
• Low power (Less than 950uW)
• Ultra-small area (0.007sq mm)

Ultra-low-power AI/ML processor and accelerator

• Allows complex inference at the very edge, at the sensor, even in battery-operated or energy harvesting devices.

WiSUN Sub-GHz 433, 868, 915MHz Transceiver IP

• Multi-Band 433/868/915MHz
• Supply Voltages Core: 1.0-1.2V, I/O: 2.0-3.6V
• Junction Temperature Range -40 to +125C

UCIe Die-to-Die Chiplet Controller

• AXI over UCIe Streaming Protocol
• Link Error Detection and Retry Feature
• APB for Controller Control

40G UCIe PHY for organic substrate standard packages

• Data rates up to 40Gbps per pin while also compliant with the latest UCIe specification
• Self-contained hard macro

Droop Detector - TSMC CLN2P

• Integrated voltage reference for stand-alone operation
• Easy to integrate with no additional components or special power requirements

Low Phase Noise, High-performance Digital LC PLL

Deskew Frequency Synthesizer PLL

6.6GHz Integer PLL

• 5nm Low Power Enhanced (LN05LPE) CMOS device technology
• Dual power supply of 1.2V±10% and 1.2V+10% ~ 0.5V-5%

Fractional-N Frequency Synthesizer PLL

• Wide functional range allows all frequencies in a system to be synthesized with one PLL macro
• Input & output frequency ranges greater than 1000:1

TSMC CLN7FF 7nm Clock Generator PLL

• 800MHz-4000MHz
• Delivers optimal jitter performance over all multiplication settings.

12bit 1Msps~3Msps low power SAR ADC IP core

DDR4 Memory Controller

NVME Host IP

• Sequential Access (Streaming)
• Random Access (I/O)
• Multi Simultaneous Users Access (Queues)

WiSUN Sub-GHz 433, 868, 915MHz Transceiver IP

• Multi-Band 433/868/915MHz
• Supply Voltages Core: 1.0-1.2V, I/O: 2.0-3.6V
• Junction Temperature Range -40 to +125C