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Fusion Recurrent Neural Network (RNN) Accelerator

• MAC utilization up to 99%
• Energy efficiency 2.06 TOPS/W
• Peak performance can scale up to 204.8 GOPS

TSMC CLN7FF General Purpose PLL

• TSMC CLN7FF 0.75V/1.8V Process
• Metal Scheme : 1P8M
• 1.8V analog supply operation and 0.75V digital supply operation

12-bit 250MS/s Dual IQ High-Speed SAR ADC

• TSMC 12nm FFC Process
• 0.8V and 1.8V Supplies
• 12-bit Dual-Channel High-Speed SAR ADC

IEEE 802.11b/g/n/ax 20MHz 2.4GHz Wi-Fi IP in TSMC40LP

• Complete 2.4 GHz low-power Wi-Fi solution
• Designed for TSMC 40nm LP CMOS process
• Internal power amplifiers

DC-DC down converter

• UMC 55nm eFlash CMOS technology
• Input Voltage Range: +2.0V to +3.6V
• Current limit detector

Scaler IP - MSCALE

• Silicon Proven Several Times for Mobile Phone
• Use Small Gate Counts
• Optimized for Power Saving

Single issue, embedded RISC-V core with 4-stage pipeline

• Provides a low risk way of deploying the SweRV Core EL2 core with either open-source or commercial EDA tools.

Crypto Coprocessor (Premium)

• Scalable architecture and crypto engines for optimal performance/resource usage
• Configurable for perfect application fit

8-bit ≤120GSa/s Ultra-high-speed DAC in TSMC 16nm CMOS

• DAC with ultra-high sampling rate, low power, high BW, high ENOB
• Process technology: 16nm
• Resolution: 8 bit

USB4 PHY in TSMC 6FF

• Supports USB4, USB 3.2, DisplayPort with HDCP 2.3 security, PCI Express, and Thunderbolt 3 connectivity protocols through USB Type-C connectors and cables

Capless Low Drop 65mA Regulator

• TSMC 12nm FFC Process, 7 Metals Used
• 2.0V Input Voltage
• 1.8V 3.5% Output Voltage

Flexible Deterministic Ethernet IP Core with TSN (Time Sensitive Networking)

• Configurable and scalable features for optimal silicon design-in
• Delivered according to ASIC development requirements

32G Multi Rate SerDes PHY - GlobalFoundries 22FDX

• Line rates from 1.25 up to 32Gbps
• PCIe up to Gen4.0
• PIPE interface

Dual thread, superscalar, embedded 32-bit RISC-V core with 9-stage pipeline

• Provides a low risk way of deploying the SweRV EH2 core with either open source or commercial EDA tools.

Fourth-Generation, High-Performance CPU Based on DynamIQ Technology

• Supports Innovation on New Consumer Devices
• Delivers Unprecedented Power Efficiency
• Provides Unrivalled Scalability for Mobile Use Cases

Crypto Coprocessor (Compact)

• Scalable architecture and crypto engines for optimal performance/resource usage
• Configurable for perfect application fit

HBM2 / HBM2E PHY

• 33% Less Area
• 72% Less Power
• 400GB/s Total Bandwidh

IEEE 802.11a/b/g/n/ac/ax 40MHz 2.4/5GHz Wi-Fi IP in TSMC40LP

• Complete 2.4/5 GHz low-power Wi-Fi solution
• Designed for TSMC 40nm LP CMOS process
• Internal power amplifiers

Bluetooth 5.2 Dual Mode RF IP in TSMC 22nm

• Bluetooth 5.2 Dual-Mode radio, including EDR and LE 2Mbps for current and for next-generation BT high-quality audio streaming.

10-bit, 5 GSPS Analog-to-Digital Converter IP block

• 10-bit resolution
• 5 GSPS sampling rate
• 19 mW power

10-bit SAR ADC TSMC

• Sampling Rate options: 1 MSps;2 MSps;5 MSps;10 MSps;15 MSps;20 MSps
• Quick re-configuration to your specification
• Up to 10-bit resolution

12-bit, 16 GSPS High Performance RF ADC in CMOS

MIPI D-PHY / C-PHY Combo IP for TSMC 22nm

• Compliant to MIPI Alliance Standard for C-PHY specification Version 1.2
• Compliant to MIPI Alliance Standard for D-PHY specification Version 1.2

USB4 Device Router IP for 40 Gbps Speeds

• USB4 PHY IP
• Supports 40 Gbps, 20 Gbps, 10 Gbps, and 5 Gbps data rates
• x1 and x2 configurations (USB 3.2 and USB 3.1 PHY only)