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New Silicon IP
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11-bit, 5 GSPS Analog to Digital Converter
- 11-bit resolution
- 5 GSPS sampling rate
- 6 GHz Input Bandwidth
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Ultra High-Performance AES-XTS/ECB IP
- Scalable high-performance & low latency AES-XTS/ECB cores with efficient support for varied networking traffic
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MIPI D-PHY IP 4.5Gbps in TSMC N7
- Supports MIPI Alliance Specification for D-PHY Version 2.5
- Consists of 1 Clock lane and 4 Data lanes
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Edge AI/ML accelerator (NPU)
- Near-memory compulting techology to improve energy efficiency and decrease memory bandwidth requirements
- Hardware flexibility to cover various NN model architectures
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SPD5 HUB MIPI I3C Interface
- Time saving and Easy to integrated in your SoC
- Compliance as per JEDEC specification
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MIPI RFFE Slave Controller v3.0
- Compliant with MIPI’s RFFE specification Rev3.0
- Small silicon footprint
- Scalable Implementation
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Neural Processing Engine
- 30 TOPS/W
- 10-20x lower power
- 10-8x smaller die area
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Low-power PHY IP for PCIe 4.0 on TSMC N7
- Compliant with PCIe® 4.0, 3.1, 2.1, 1.1, and PIPE specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
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MIPI C-PHY v2.0 /D-PHY v2.5 Combo IP in TSMC
- Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0
- Support both MIPI DSI and CSI-2 protocols
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1000BASE-T1 & 100BASE-T1 automotive ethernet combo PHY
- GlobalFoundries, 22FDX
- Combo-PHY IP
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RISC-V Multiprocessor - Superscalar Performance
- Multi-issue superscalar Out of Order (OOO) with Multi-threading
- Enhanced Coherence Manager with L2$
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Digital Power Grid Overlay
- 20% to 40% Digital and Dynamic Power Reduction
- Fits into any IC Digital PowerGrid Any IP compliant
Top Silicon IP
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1
Post-Quantum Cryptographic Processor
- FPGA proven
- Offer tuneable performance and size
- AXI4 ready
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2
DisplayPort Transmitter & Receiver
- Compliant to Display Port 2.0/eDP1.5.
- Dynamic support for RGB / YCbCr444 / YCbCr422 / RAW and Y only formats.
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3
TSMC CLN7FF GLink-3D Die-to-Die Slave PHY
- Supports SoIC (3DFabric) CoW and WoW assembly
- Supports face to face and face to back with the same GDSII
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RISC-V Multiprocessor - Superscalar Performance
- Multi-issue superscalar Out of Order (OOO) with Multi-threading
- Enhanced Coherence Manager with L2$
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Non-Blocking NxN Crossbar Switch
- Low latency crossbar switch
- High throughput
- Smaller are and power
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1000BASE-T1 & 100BASE-T1 automotive ethernet combo PHY
- GlobalFoundries, 22FDX
- Combo-PHY IP
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PUF-based Secure Crypto Coprocessor
- Provide a much easier to adopt hardware RoT with less vulnerability
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MIPI C-PHY v2.0 /D-PHY v2.5 Combo IP in TSMC
- Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0
- Support both MIPI DSI and CSI-2 protocols
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Digital Power Grid Overlay
- 20% to 40% Digital and Dynamic Power Reduction
- Fits into any IC Digital PowerGrid Any IP compliant
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10
1.2V GPIO
- ESD Protection
- Latch-up Immunity:
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4-/8-bit mixed-precision NPU IP
- Easy customization at different core sizes and performance
- NN Converter converts a network file into an internal network format and supports ONNX (PyTorch), TF-Lite, and CFG (Darknet)
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32G Chip-to-Chip SerDes PHY
- Industry’s lowest power, area and latency for operation from 1 to 32 Gbps
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